DSPA56371AF150B Freescale Semiconductor, DSPA56371AF150B Datasheet - Page 42
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DSPA56371AF150B
Manufacturer Part Number
DSPA56371AF150B
Description
Manufacturer
Freescale Semiconductor
Datasheet
1.DSPA56371AF150B.pdf
(68 pages)
Specifications of DSPA56371AF150B
Device Core Size
24b
Format
Fixed Point
Clock Freq (max)
150MHz
Mips
150
Device Input Clock Speed
150MHz
Program Memory Size
192KB
Operating Supply Voltage (typ)
1.25/3.3V
Operating Supply Voltage (min)
1.2/3.14V
Operating Temp Range
-40C to 115C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
LQFP
Lead Free Status / Rohs Status
Compliant
Serial Host Interface SPI Protocol Timing
42
Note:
No.
34
35
36
37
38
39
40
41
42
43
1. V
2. Periodically sampled, not 100% tested
3. All times assume noise free inputs
4. All times assume internal clock frequency of 150 MHz
5. Equation applies when the result is positive T
SCK edge to data out not valid
(data out hold time)
SS assertion to data out valid
(CPHA = 0)
First SCK sampling edge to HREQ output deassertion
Last SCK sampling edge to HREQ output not
deasserted (CPHA = 1)
SS deassertion to HREQ output not deasserted
(CPHA = 0)
SS deassertion pulse width (CPHA = 0)
HREQ in assertion to first SCK edge
HREQ in deassertion to last SCK sampling edge
(HREQ in set-up time) (CPHA = 1)
First SCK edge to HREQ in not asserted
(HREQ in hold time)
HREQ assertion width
CORE_VDD
= 1.2 5 ± 0.05 V; T
Table 20. Serial Host Interface SPI Protocol Timing (continued)
Characteristics
J
= –40°C to 115°C for 150 MHz; T
Figure 9. SPI Master Timing (CPHA = 0)
1,3,4
DSP56371 Data Sheet, Rev. 4.1
C
Master/Slave
J
= 0°C to 100°C for 181 MHz; C
Master
Master
Master
Master
Mode
Slave
Slave
Slave
Slave
Slave
0.5 x T
Expressions
3.0 x T
3.0 x T
x T
2.0 x T
4.0 x T
2.0 x T
3.0 x T
SPICC
—
—
—
C
C
C
+ 5
+ 30
+ 30
C
C
C
C
+ 3.0
L
= 50 pF
Freescale Semiconductor
12.0
52.2
46.6
12.7
63.0
20.0
Min
—
50
0
0
Max
15.0
—
—
—
—
—
—
—
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns