AM29F200BT-55EC AMD (ADVANCED MICRO DEVICES), AM29F200BT-55EC Datasheet - Page 5

• Manufacturer Part Number: AM29F200BT-55EC
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM29F200BT-55EC

• Cell Type: NOR
• Density: 2Mb
• Access Time (max): 55ns
• Interface Type: Parallel
• Boot Type: Top
• Address Bus: 18/17Bit
• Operating Supply Voltage (typ): 5V
• Operating Temp Range: 0C to 70C
• Package Type: TSOP
• Program/erase Volt (typ): 4.5 to 5.5V
• Sync/async: Asynchronous
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Word Size: 8/16Bit
• Number Of Words: 256K/128K
• Supply Current: 50mA
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / Rohs Status: Not Compliant

TABLE OF CONTENTS
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 4
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . 5
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 7
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . 8
Command Definitions . . . . . . . . . . . . . . . . . . . . . 12
August 3, 2009 21526D6
Word/Byte Configuration .......................................................... 8
Requirements for Reading Array Data ..................................... 8
Writing Commands/Command Sequences .............................. 8
Program and Erase Operation Status ...................................... 9
Standby Mode .......................................................................... 9
RESET#: Hardware Reset Pin ................................................. 9
Output Disable Mode ................................................................ 9
Autoselect Mode ..................................................................... 10
Sector Protection/Unprotection ............................................... 11
Temporary Sector Unprotect .................................................. 11
Hardware Data Protection ...................................................... 11
Reading Array Data ................................................................ 12
Reset Command ..................................................................... 12
Autoselect Command Sequence ............................................ 12
Word/Byte Program Command Sequence ............................. 13
Chip Erase Command Sequence ........................................... 13
Sector Erase Command Sequence ........................................ 14
Erase Suspend/Erase Resume Commands ........................... 14
Command Definitions ............................................................. 16
DQ7: Data# Polling ................................................................. 17
RY/BY#: Ready/Busy# ........................................................... 18
DQ6: Toggle Bit I .................................................................... 18
Table 1. Am29F200B Device Bus Operations ..................................8
Table 2. Am29F200T Top Boot Block Sector Address Table .........10
Table 3. Am29F200B Bottom Boot Block Sector Address Table ....10
Table 4. Am29F200B Autoselect Codes (High Voltage Method) ....11
Figure 1. Temporary Sector Unprotect Operation........................... 11
Low V
Write Pulse “Glitch” Protection ........................................................12
Logical Inhibit ..................................................................................12
Power-Up Write Inhibit ....................................................................12
Figure 2. Program Operation .......................................................... 13
Figure 3. Erase Operation............................................................... 15
Table 5. Am29F200B Command Definitions ...................................16
Figure 4. Data# Polling Algorithm ................................................... 17
CC
Write Inhibit ......................................................................12
D A T A
Am29F200B
S H E E T
Absolute Maximum Ratings. . . . . . . . . . . . . . . . . 21
Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . 21
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 22
Test Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Key to Switching Waveforms. . . . . . . . . . . . . . . . 24
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 25
Erase and Programming Performance . . . . . . . . 35
Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 35
TSOP and SO Pin Capacitance . . . . . . . . . . . . . . 35
Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 36
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 38
DQ2: Toggle Bit II ................................................................... 18
Reading Toggle Bits DQ6/DQ2 ............................................... 18
DQ5: Exceeded Timing Limits ................................................ 19
DQ3: Sector Erase Timer ....................................................... 19
TTL/NMOS Compatible .......................................................... 22
CMOS Compatible .................................................................. 23
Read Operations .................................................................... 25
Hardware Reset (RESET#) .................................................... 26
Word/Byte Configuration (BYTE#)
Erase/Program Operations ..................................................... 28
Temporary Sector Unprotect .................................................. 32
Alternate CE# Controlled Erase/Program Operations ............ 33
SO 044—44-Pin Small Outline Package ................................ 36
TS 048—48-Pin Standard Thin Small Outline Package ......... 37
Figure 5. Toggle Bit Algorithm........................................................ 19
Table 6. Write Operation Status ..................................................... 20
Figure 8. Test Setup....................................................................... 24
Table 7. Test Specifications ........................................................... 24
Figure 9. Read Operations Timings ............................................... 25
Figure 10. RESET# Timings .......................................................... 26
Figure 11. BYTE# Timings for Read Operations............................ 27
Figure 12. BYTE# Timings for Write Operations............................ 27
Figure 13. Program Operation Timings.......................................... 29
Figure 14. Chip/Sector Erase Operation Timings .......................... 30
Figure 15. Data# Polling Timings (During Embedded Algorithms). 31
Figure 16. Toggle Bit Timings (During Embedded Algorithms)...... 31
Figure 17. DQ2 vs. DQ6................................................................. 32
Figure 18. Temporary Sector Unprotect Timing Diagram .............. 32
Figure 19. Alternate CE# Controlled Write Operation Timings ...... 34
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