AT29BV010A-30TI Atmel, AT29BV010A-30TI Datasheet - Page 4

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AT29BV010A-30TI

Manufacturer Part Number
AT29BV010A-30TI
Description
Manufacturer
Atmel
Datasheet

Specifications of AT29BV010A-30TI

Cell Type
NOR
Density
1Mb
Access Time (max)
300ns
Interface Type
Parallel
Boot Type
Bottom/Top
Address Bus
17b
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Package Type
TSOP-I
Program/erase Volt (typ)
2.7 to 3.6V
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8b
Number Of Words
128K
Supply Current
15mA
Mounting
Surface Mount
Pin Count
32
Lead Free Status / Rohs Status
Not Compliant

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Part Number
Manufacturer
Quantity
Price
Part Number:
AT29BV010A-30TI
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ATM
Quantity:
6 250
Part Number:
AT29BV010A-30TI
Manufacturer:
ATM
Quantity:
6 250
4.3
4.4
4.5
4.6
4.7
4
Hardware Data Protection
Input Levels
Product Identification
DATA Polling
Toggle Bit
AT29BV010A
The 128 bytes of data must be loaded into each sector. Any byte that is not loaded during the
programming of its sector will be indeterminate. Once the bytes of a sector are loaded into the
device, they are simultaneously programmed during the internal programming period. After the
first data byte has been loaded into the device, successive bytes are entered in the same man-
ner. Each new byte to be programmed must have its high to low transition on WE (or CE) within
150 s of the low to high transition of WE (or CE) of the preceding byte. If a high to low transition
is not detected within 150 s of the last low to high transition, the load period will end and the
internal programming period will start. A7 to A16 specify the sector address. The sector address
must be valid during each high to low transition of WE (or CE). A0 to A6 specify the byte address
within the sector. The bytes may be loaded in any order; sequential loading is not required.
Hardware features protect against inadvertent programs to the AT29BV010A in the following
ways: (a) V
power on delay—once V
out 10 ms (typical) before programming; (c) Program inhibit—holding any one of OE low, CE
high or WE high inhibits program cycles; and (d) Noise filter— pulses of less than 15 ns (typical)
on the WE or CE inputs will not initiate a program cycle.
While operating with a 2.7V to 3.6V power supply, the address inputs and control inputs OE, CE
and WE) may be driven from 0 to 5.5V without adversely affecting the operation of the device.
The I/O lines can only be driven from 0 to V
The product identification mode identifies the device and manufacturer as Atmel. It may be
accessed by hardware or software operation. The hardware operation mode can be used by an
external programmer to identify the correct programming algorithm for the Atmel product. In
addition, users may wish to use the software product identification mode to identify the part (i.e.
using the device code), and have the system software use the appropriate sector size for pro-
gram operations. In this manner, the user can have a common board design for 256K to 4-
megabit densities and, with each density’s sector size in a memory map, have the system soft-
ware apply the appropriate sector size.
For details, see Operating Modes (for hardware operation) or Software Product Identification.
The manufacturer and device code is the same for both methods of identification.
The AT29BV010A features DATA polling to indicate the end of a program cycle. During a pro-
gram cycle an attempted read of the last byte loaded will result in the complement of the loaded
data on I/O7. Once the program cycle has been completed, true data is valid on all outputs and
the next cycle may begin. DATA polling may begin at any time during the program cycle.
In addition to DATA polling the AT29BV010A provides another method for determining the end
of a program or erase cycle. During a program or erase operation, successive attempts to read
data from the device will result in I/O6 toggling between one and zero. Once the program cycle
has completed, I/O6 will stop toggling and valid data will be read. Examining the toggle bit may
begin at any time during a program cycle.
CC
sense—if V
CC
CC
has reached the V
is below 2.0V (typical), the program function is inhibited; (b) V
CC
+ 0.6V.
CC
sense level, the device will automatically time
0519F–FLASH–9/08
CC

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