RC28F256J3C125 Intel, RC28F256J3C125 Datasheet - Page 23

no-image

RC28F256J3C125

Manufacturer Part Number
RC28F256J3C125
Description
Manufacturer
Intel
Datasheet

Specifications of RC28F256J3C125

Cell Type
NOR
Density
256Mb
Access Time (max)
125ns
Interface Type
Parallel
Boot Type
Not Required
Address Bus
25/24Bit
Operating Supply Voltage (typ)
3/3.3V
Operating Temp Range
-40C to 85C
Package Type
EZBGA
Program/erase Volt (typ)
2.7 to 3.6V
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8/16Bit
Number Of Words
32M/16M
Mounting
Surface Mount
Pin Count
64
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
RC28F256J3C125
Manufacturer:
ALLEGRO
Quantity:
3 400
Part Number:
RC28F256J3C125
Manufacturer:
INTEL
Quantity:
20 000
Part Number:
RC28F256J3C125SL7HE
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Address [A]
Datasheet
Data [D/Q]
R12
R13
R14
R15
R16
NOTES:
CE
defined at the first edge of CE0, CE1, or CE2 that disables the device (see
BYTE#[F]
1. See AC Input/Output Reference Waveforms for the maximum allowable input slew
2. OE# may be delayed up to t
3. See
4. When reading the flash array a faster t
5. Sampled, not 100% tested.
6. For devices configured to standard word/byte read mode, R15 (t
WE# [W]
#
OE# [G]
RP# [P]
CEx [E]
X
rate.
enables the device (see
V” on page 29
page 30
Status Register reads, query reads, or device identifier reads.
(t
Table 8. Read Operations (Sheet 2 of 2)
(All units in ns unless
Figure 9. Single Word Asynchronous Read Waveform
low is defined as the first edge of CE0, CE1, or CE2 that enables the device. CE
AVQV
otherwise noted)
t
t
t
t
t
t
FLQV/
FHQV
FLQZ
EHEL
APA
GLQV
Asynchronous
Sym
Specifications
Figure 15, “Transient Input/Output Reference Waveform for VCCQ = 2.7 V–3.6
).
for testing characteristics.
BYTE# to Output Delay
BYTE# to Output in High Z
CEx High to CEx Low
Page Address Access Time
OE# to Array Output Delay
Parameter
and
Figure 16, “Transient Equivalent Testing Load Circuit” on
R6
R11
R7
Table
ELQV
13) without impact on t
Density
Speed
-t
R5
Bin
GLQV
R2
R3
R16
GLQV
R4
after the first edge of CE0, CE1, or CE2 that
R12
Min
0
(R16) applies. Non-array reads refer to
-110
1000
1000
Max
25
25
ELQV
Min
.
0
R1
R1
V
-115
V
CCQ
Table
CC
1000
1000
Max
APA
25
25
= 2.7 V–3.6 V
= 2.7 V–3.6 V
R13
13).
) will equal R2
Min
X
0
high is
-120
1000
1000
Max
25
25
(3)
(3)
Min
0
-125
1000
1000
Max
30
25
256-Mbit J3 (x8/x16)
Min
0
-150
R10
R8
R9
1000
1000
Max
25
25
Notes
1,2,5
1,2,5
5, 6
1,2
4
23

Related parts for RC28F256J3C125