LT5537EDDB#PBF Linear Technology, LT5537EDDB#PBF Datasheet - Page 7

• Manufacturer Part Number: LT5537EDDB#PBF
• Manufacturer: Linear Technology

Specifications of LT5537EDDB#PBF

• Pin Count: 8
• Screening Level: Industrial
• Package Type: DFN
• Lead Free Status / Rohs Status: Compliant

PI FU CTIO S
BLOCK DIAGRA
ENBL (Pin 1): Enable Pin. When the input voltage is higher
than 1V, the circuit is ON. When the input voltage is less than
0.3V, or this pin is not connected, the chip is disabled (OFF).
IN
pins are internally biased to V
between IN
200MHz. The input pins should be AC coupled.
CAP
minimum RF input frequency can be lowered by adding an
optional external capacitor between CAP
+
U
, IN
+
, CAP
–
(Pins 2, 3): Differential Signal Input Pins. These
U
–
+
(Pins 4, 5): External Filter Capacitor Pins. The
and IN
2
3
1
–
U
IN
IN
ENBL
is approximately 1.73kΩ//1.45pF at
+
–
W
BANDGAP REFERENCE
AND BIASING
CC
7k
– 0.4V. The impedance
7k
+
and CAP
DETECTOR CELLS
CANCELLATION
4
CAP
OFFSET
–
.
+
EXPOSED PAD
5
CAP
7
–
V
using 1000pF and 0.1µF capacitors.
V
OUT (Pin 8): Output pin.
Exposed Pad (Pin 9): Should be connected to PCB ground.
CC
EE
(Pin 6): Power Supply Pin. This pin should be decoupled
(Pin 7): Ground pin.
OUTPUT
BUFFER
7.2k
OUT
V
V
CC
EE
5537 BD
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8
7
LT5537
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