WJCE6353 S L9G5 Intel, WJCE6353 S L9G5 Datasheet - Page 24

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WJCE6353 S L9G5

Manufacturer Part Number
WJCE6353 S L9G5
Description
Manufacturer
Intel
Datasheet

Specifications of WJCE6353 S L9G5

Pin Count
64
Screening Level
Commercial
Package Type
LQFP
Lead Free Status / Rohs Status
Compliant
Data Sheet
Typical load capacitance
Drive level
Equivalent series resistance
Figure 14 - Crystal Oscillator Circuit
4.5.1
The capacitor values used must ensure correct operation of the Pierce oscillator such that the total loop gain is greater
than unity. Correct selection of the two capacitors is very important and the following method is recommended to obtain
values for C1 and C2. Alternatively there is a calculator available (ZLAN-125) that will calculate the external component
values for you.
4.5.1.1
Although oscillation may still occur if the loop gain is just above 1, a loop gain of between 5 and 25 is optimum to ensure
that oscillations will occur across all variations in temperature, process and supply voltage, and that the circuit will exhibit
good start-up characteristics.
Equation 1 -
Equation 2 -
4.5.1.2
24
A
Cin
Cout
Cpar
Zo
gm
Rf
ESR
f
Selection of External Components
total loop gain (between 5 and 25)
C1 + Cpar
C2 + Cpar
parasitic capacitance associated with each oscillator pin (XTI and XTO). It consists of track capacitances,
package capacitance and cell input capacitance. Normally Cpar ≈ 4pF.
9.143kΩ - output impedance of amplifier at 1.8V operation - typical
8.736mA/V - transconductance of amplifier at 1.8V operation -typical
2.3MΩ - internal feedback resistor
maximum equivalent series resistance of crystal - given by crystal manufacturer (Ω)
fundamental frequency of crystal (Hz)
Loop Gain Equation
List of Equation Parameters
- A =
- Z
in
=
C
(2.π.f.C
out
C
in
.g
m
out
1
)
2
.ESR
C
out
C1
R
f
.C
+ C
XTI
in
in
XTI
+
Z
1
in
Intel Corporation
+
CE6353
Z
1
o
20 pF
0.4 mW max
<40 Ω
XT0
-1
C2
OSCMODE

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