TDA6508ATT/C3,118 NXP Semiconductors, TDA6508ATT/C3,118 Datasheet - Page 8

• Manufacturer Part Number: TDA6508ATT/C3,118
• Manufacturer: NXP Semiconductors

Specifications of TDA6508ATT/C3,118

• Lead Free Status / Rohs Status: Compliant

Philips Semiconductors
8
8.1
The address byte ADB contains programmable module
address bits MA1 and MA0 which allow up to four
synthesizers to be used in the same system, and are
configured by applying one of four possible voltages on
pin AS; see Tables 1 and 2. For each voltage on pin AS,
the resultant values of bits MA1 and MA0 are shown in
Table 3.
8.2
The write mode is defined by setting bit R/W to logic 0 in
address byte ADB; see Table 1.
Data bytes can be sent to the device after sending the first
address byte. Four data bytes are required to fully program
the device.
The bus transceiver has an auto-increment facility which
allows the device to be programmed by one transmission
(address byte with 4 data bytes). The device can be
partially programmed provided that the first data byte
following the address byte is divider byte DB1 or control
byte CB.
2005 Mar 25
3-band mixer/oscillator and PLL for
terrestrial tuners
I
2
C-BUS DATA FORMAT
I
Write mode
2
C-bus address selection
Fig.4 Pin configuration for TDA6509 and TDA6509A (HVQFN32).
handbook, halfpage
LOW_OSCOUT
HIGH_OSCIN1
HIGH_OSCIN2
MID_OSCIN1
MID_OSCIN2
LOW_OSCIN
OSC_GND
V CC
8
7
6
5
4
3
2
1
TDA6509A
TDA6509
8
The MSB of the first data byte DB1 indicates whether
frequency data (MSB = 0) or control and band switch data
will follow. Additional data bytes can be entered without the
need to re-address the device until an I
command is sent by the controller.
The frequency divider register is loaded after the 8th clock
pulse of byte DB2. The control register is loaded after the
8th clock pulse of byte CB, and the band switch register is
loaded after the 8th clock pulse of byte BB.
MDB225
17
18
19
20
21
22
23
24
SCL
SDA
P3
P0
P1
P2
IFAMP_IN2
IFAMP_IN1
TDA6508; TDA6508A;
TDA6509; TDA6509A
Product specification
2
C-bus STOP