ATA5824-PLQW 80 Atmel, ATA5824-PLQW 80 Datasheet - Page 57

• Manufacturer Part Number: ATA5824-PLQW 80
• Manufacturer: Atmel

Specifications of ATA5824-PLQW 80

• Operating Temperature (min): -40C
• Operating Temperature (max): 105C
• Operating Temperature Classification: Industrial
• Product Depth (mm): 7mm
• Product Height (mm): 0.9mm
• Product Length (mm): 7mm
• Operating Supply Voltage (typ): 5V
• Lead Free Status / Rohs Status: Compliant

Figure 14-5. Timing Diagram for Failed Bit-check (Condition CV_Lim < Lim_min)
Figure 14-6. Timing Diagram for Failed Bit-check (Condition: CV_Lim
14.1.6
4829D–RKE–06/06
Bit-check counter
Bit-check counter
Duration of the Bit-check
(Lim_min = 14, Lim_max = 24)
(Lim_min = 14, Lim_max = 24)
RX_ACTIVE
RX_ACTIVE
Demod_Out
Demod_Out
Bit check
Bit check
T
Start-up mode
T
Start-up mode
Startup_Sig_Proc
Startup_Sig_Proc
If no transmitter is present during the Bit-check, the output of the ASK/FSK demodulator delivers
random signals. The Bit-check is a statistical process and T
fore, an average value for T
the selected bit-rate range and on T
T
In the presence of a valid transmitter signal, T
nal, f
longer period for T
Bit-check
0
0
Signal
Bit check failed (CV_Lim < Lim_min)
resulting in a lower current consumption in RX polling mode.
1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 9 101112
1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 9 101112
, and the count of the bits, N
Bit-check mode
Bit-check
T
Bit_check
requiring a higher value for the transmitter pre-burst T
1/2 Bit
1/2 Bit
Bit-check mode
Bit-check
Bit check failed (CV_Lim < Lim_min)
T
Bit_check
is given in the electrical characteristics. T
XDCLK
Bit-check
131415161718192021222324
. A higher bit-rate range causes a lower value for
. A higher value for N
Bit-check
Lim_max)
is dependent on the frequency of that sig-
Sleep mode
Bit-check
ATA5823/ATA5824
T
Sleep
0
varies for each check. There-
Sleep mode
Bit-check
T
Sleep
0
thereby results in a
Bit-check
Preburst
depends on
.
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