74LVC10APW NXP Semiconductors, 74LVC10APW Datasheet - Page 2

Gates (AND / NAND / OR / NOR) TRIPLE 3-INPUT NAND GATE

74LVC10APW

Manufacturer Part Number
74LVC10APW
Description
Gates (AND / NAND / OR / NOR) TRIPLE 3-INPUT NAND GATE
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74LVC10APW

Product
NAND
Logic Family
LVC
Number Of Gates
3
Number Of Lines (input / Output)
3 / 1
High Level Output Current
- 24 mA
Low Level Output Current
24 mA
Propagation Delay Time
3.9 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
1.2 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
TSSOP-14
Minimum Operating Temperature
- 40 C
Lead Free Status / Rohs Status
 Details
Other names
74LVC10APW,112

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74LVC10APW
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Philips Semiconductors
FEATURES
QUICK REFERENCE DATA
GND = 0 V; T
Notes
1. C
2. The condition is V
ORDERING INFORMATION
2003 Jun 20
C
C
74LVC10AD
74LVC10ADB
74LVC10APW
74LVC10ABQ
t
PHL
Wide supply voltage range from 1.2 to 3.6 V
Inputs accept voltages up to 5.5 V
CMOS low power consumption
Direct interface with TTL levels
Latch-up performance exceeds 250 mA
In accordance with JEDEC standard no. 8-1A
ESD protection:
HBM EIA/JESD22-A114-A exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V.
I
PD
Triple 3-input NAND gate
SYMBOL
P
f
f
C
V
N = total switching outputs;
i
o
(C
/t
D
CC
PD
= input frequency in MHz;
L
= output frequency in MHz;
TYPE NUMBER
PLH
= output load capacitance in pF;
= C
L
is used to determine the dynamic power dissipation (P
= supply voltage in Volts;
PD
V
CC
amb
2
V
CC
= 25 C; t
propagation delay nA, nB, nC to nY
input capacitance
power dissipation capacitance per gate
f
o
2
) = sum of the outputs.
I
f
= GND to V
i
N + (C
r
= t
f
PARAMETER
TEMPERATURE RANGE
2.5 ns.
L
CC
.
V
40 to +85 C
40 to +85 C
40 to +85 C
40 to +85 C
CC
2
f
o
) where:
2
C
notes 1 and 2
DESCRIPTION
The 74LVC10A is a high-performance, low-power,
low-voltage, Si-gate CMOS device and superior to most
advanced CMOS compatible TTL families.
The 74LVC10A provides the 3-input NAND function.
L
D
= 50 pF; V
PINS
in W).
14
14
14
14
CONDITIONS
CC
DHVQFN14
PACKAGE
TSSOP14
= 3.3 V
SSOP14
SO14
PACKAGE
3.9
5.0
26
MATERIAL
TYPICAL
plastic
plastic
plastic
plastic
Product specification
74LVC10A
ns
pF
pF
SOT108-1
SOT337-1
SOT402-1
SOT762-1
CODE
UNIT

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