74LVC10APW NXP Semiconductors, 74LVC10APW Datasheet - Page 4

• Manufacturer Part Number: 74LVC10APW
• Description: Gates (AND / NAND / OR / NOR) TRIPLE 3-INPUT NAND GATE
• Manufacturer: NXP Semiconductors

Specifications of 74LVC10APW

• Product: NAND
• Logic Family: LVC
• Number Of Gates: 3
• Number Of Lines (input / Output): 3 / 1
• High Level Output Current: - 24 mA
• Low Level Output Current: 24 mA
• Propagation Delay Time: 3.9 ns
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 1.2 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: TSSOP-14
• Minimum Operating Temperature: - 40 C
• Lead Free Status / Rohs Status: Details
• Other names: 74LVC10APW,112

Philips Semiconductors
2003 Jun 20
handbook, halfpage
handbook, halfpage
Triple 3-input NAND gate
Fig.1 Pin configuration SO14 and (T)SSOP14.
GND
1A
1B
2A
2B
2C
2Y
13
10
11
Fig.3 Logic symbol.
1
2
3
4
5
9
1
2
3
4
5
6
7
1A
1B
1C
2A
2B
2C
3A
3B
3C
10
MNA756
MNA757
1Y
2Y
3Y
14
13
12
11
10
9
8
12
6
8
V CC
1C
1Y
3C
3B
3A
3Y
4
handbook, halfpage
handbook, halfpage
(1) The die substrate is attached to this pad using conductive die
attach material. It can not be used as a supply pin or input.
Fig.2 Pin configuration DHVQFN4.
2C
1B
2A
2B
2Y
Fig.4 Logic symbol (IEEE/IEC).
Top view
13
10
11
1
2
3
4
5
9
2
3
4
5
6
GND
1A
7
1
GND
&
&
&
MNA759
V CC
(1)
3Y
14
8
12
Product specification
MNA970
6
8
74LVC10A
13
12
10
11
9
1C
1Y
3C
3B
3A