M95320-WMN6 STMicroelectronics, M95320-WMN6 Datasheet - Page 13

• Manufacturer Part Number: M95320-WMN6
• Description: EEPROM 5.5V 32K (4Kx8)
• Manufacturer: STMicroelectronics

Specifications of M95320-WMN6

• Memory Size: 32 Kbit
• Organization: 4 K x 8
• Interface Type: SPI
• Maximum Clock Frequency: 5 MHz
• Access Time: 60 ns
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.5 V
• Maximum Operating Current: 4 mA
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SO-8
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 2.5 V, 5.5 V
• Operating Temperature: - 40 C to + 85 C
• Lead Free Status / Rohs Status: No

M95320, M95320-W, M95320-R
4.1.4
4.2
4.2.1
Power-down
During power-down (continuous decrease in the V
V
●
●
Active Power and Standby Power modes
When Chip Select (S) is low, the device is selected, and in the Active Power mode. The
device consumes I
When Chip Select (S) is high, the device is deselected. If a Write cycle is not currently in
progress, the device then goes in to the Standby Power mode, and the device consumption
drops to I
Hold condition
The Hold (HOLD) signal is used to pause any serial communications with the device without
resetting the clocking sequence.
During the Hold condition, the Serial Data output (Q) is high impedance, and Serial Data
input (D) and Serial Clock (C) are Don’t Care.
To enter the Hold condition, the device must be selected, with Chip Select (S) low.
Normally, the device is kept selected, for the whole duration of the Hold condition.
Deselecting the device while it is in the Hold condition, has the effect of resetting the state of
the device, and this mechanism can be used if it is required to reset any processes that had
been in progress.
The Hold condition starts when the Hold (HOLD) signal is driven low at the same time as
Serial Clock (C) already being low (as shown in
The Hold condition ends when the Hold (HOLD) signal is driven high at the same time as
Serial Clock (C) already being low.
Figure 5
with Serial Clock (C) being low.
Figure 5.
HOLD
CC
C
operating voltage defined in
deselected (Chip Select S should be allowed to follow the voltage applied on V
in Standby Power mode (there should not be any internal write cycle in progress).
also shows what happens if the rising and falling edges are not timed to coincide
CC1
Hold condition activation
.
CC
, as specified in
Doc ID 5711 Rev 12
Condition
Table
Hold
Table 13
8,
Table 9
to
Figure
Table
and
CC
supply voltage below the minimum
Table
16.
5).
10), the device must be:
Condition
Hold
Operating features
CC
AI02029D
)
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