74LVC2G17GW-G NXP Semiconductors, 74LVC2G17GW-G Datasheet - Page 16

Buffers & Line Drivers 3.3V DUAL SCHMITT TRIGGER BUFF

74LVC2G17GW-G

Manufacturer Part Number
74LVC2G17GW-G
Description
Buffers & Line Drivers 3.3V DUAL SCHMITT TRIGGER BUFF
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74LVC2G17GW-G

Logic Family
LVC
Logic Type
CMOS
Number Of Channels Per Chip
2
Polarity
Non-Inverting
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.65 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
SOT-363-6
High Level Output Current
- 32 mA
Low Level Output Current
32 mA
Minimum Operating Temperature
- 40 C
Number Of Lines (input / Output)
2 / 2
Propagation Delay Time
3.8 ns at 2.7 V
Lead Free Status / Rohs Status
 Details
Other names
74LVC2G17GW,125
NXP Semiconductors
17. Abbreviations
Table 12.
18. Revision history
Table 13.
74LVC2G17
Product data sheet
Acronym
CMOS
DUT
ESD
HBM
MM
TTL
Document ID
74LVC2G17 v.5
Modifications:
74LVC2G17 v.4
74LVC2G17 v.3
74LVC2G17 v.2
74LVC2G17 v.1
Abbreviations
Revision history
Description
Complementary Metal-Oxide Semiconductor
Device Under Test
ElectroStatic Discharge
Human Body Model
Machine Model
Transistor-Transistor Logic
Release date
20100806
20061009
20050926
20040908
20030813
Added type number 74LVC2G17GN (SOT1115/XSON6 package).
Added type number 74LVC2G17GS (SOT1202/XSON6 package).
All information provided in this document is subject to legal disclaimers.
Data sheet status
Product data sheet
Product data sheet
Product data sheet
Product specification
Product specification
Rev. 5 — 6 August 2010
Dual non-inverting Schmitt trigger with 5 V tolerant input
Change notice
-
-
-
-
-
74LVC2G17
74LVC2G17 v.1
-
Supersedes
74LVC2G17 v.4
74LVC2G17 v.3
74LVC2G17 v.2
© NXP B.V. 2010. All rights reserved.
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