CS5523-AS Cirrus Logic Inc, CS5523-AS Datasheet - Page 45

• Manufacturer Part Number: CS5523-AS
• Description: ADC (A/D Converters) 4-Ch 16-Bit Delta Sigma ADC
• Manufacturer: Cirrus Logic Inc

Specifications of CS5523-AS

• Architecture: Delta-Sigma
• Conversion Rate: 0.617 KSPs
• Input Type: Voltage
• Maximum Power Dissipation: 500 mW
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SOIC-8
• Minimum Operating Temperature: - 40 C
• Lead Free Status / Rohs Status: No

1.8.1 Charge Pump Drive Circuits
The CPD (Charge Pump Drive) pin of the converter
can be used with external components (shown in
Figure 21) to develop an appropriate negative bias
voltage for the NBV pin. When CPD is used to gen-
erate the NBV, the NBV voltage is regulated with
an internal regulator loop referenced to VA+.
Therefore, any change on VA+ results in a propor-
tional change on NBV. With VA+ = 5 V, NBV’s
regulation is set proportional to VA+ at approxi-
mately -2.1 V.
Figure 24 illustrates a charge pump circuit when
the converters are powered from a +3.0 V digital
supply. Alternatively, the negative bias supply can
be generated from a negative supply voltage or a
resistive divider as illustrated in Figure 25.
For ground-based signals with the instrumentation
amplifier engaged (when in the 25 mV, 55 mV, or
100 mV ranges), the voltage on the NBV pin
should at no time be less negative than -1.8 V or
more negative than -2.5 V. To prevent excessive
voltage stress to the chip when the instrumentation
amplifier isn’t engaged (when in the 1 V, 2.5 V, or
5 V ranges) the NBV voltage should not be more
negative than -2.5 V.
The components in Figure 21 are the preferred
components for the CPD filter. However, smaller
capacitors can be used with acceptable results. The
DS317F8
Figure 24. Charge Pump Drive Circuit for VD+ = 3 V
10
safety requirements prohibit the use of electrolytic
capacitors. In this case, four 0.47
pacitors in parallel can be used.
Note: The charge pump is designed to nominally provide
1.9 Digital Gain Scaling
The CS5521/22/23/24 and CS5528 all feature a
gain register capable of being scaled from 0.6 to 4-
2
verter are defined with a voltage reference of 2.5 V
and the gain register set at approximately 1.0. The
gain register can be manipulated to scale the input
for ranges other than those specified. For example,
when using a 2.5 V voltage reference, and the
25 mV input range setting, the gain register can be
changed from 1.000 to 2.000 (shift the entire regis-
ter contents to the left one position) to achieve an
input span of 12.5 mV. Under this condition the
full span of the converter codes will appear across
a 12.5 mV span. The amount of noise in the con-
-22
N B V
μ
F ensures very low ripple on NBV. Intrinsic
in decimal. The specified ranges of the con-
400
when a 0.033
(XIN = 32.768 kHz). When a larger pumping capaci-
tor is used, the charge pump can source more current
to power external loads. Refer to Applications Note
152 “Using the CS5521/23, CS5522/24/28, and
CS5525/26 Charge Pump Drive for External Loads”
for more details on using the charge pump with exter-
nal loads.
BAT85
μ
A of current for the instrumentation amplifier
+
Figure 25. Alternate NBV Circuits
o r sim ila r
2N 50 87
10 μ F
-5 V
CS5521/22/23/24/28
μ
F pumping capacitor is used
3 4.8K Ω
3 0.1K Ω
N B V
BAT85
2 .0 K Ω
μ
F ceramic ca-
-5V
2 .1 K Ω
+
1 0 μ F
45