MAX9671CTH+T Maxim Integrated Products, MAX9671CTH+T Datasheet - Page 19

IC AUDIO/VIDEO SWIT DUAL 44TQFN

MAX9671CTH+T

Manufacturer Part Number
MAX9671CTH+T
Description
IC AUDIO/VIDEO SWIT DUAL 44TQFN
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX9671CTH+T

Function
Audio/Video Switch
Circuit
2 x SCART
Voltage Supply Source
Single Supply
Voltage - Supply, Single/dual (±)
3.3 V ~ 12 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
44-TQFN Exposed Pad
For Use With
MAX9671EVKIT+ - EVALUATION KIT FOR MAX9671
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
REPEATED START condition, an acknowledge or a not
acknowledge, and a STOP condition. SDA operates as
both an input and an open-drain output. A pullup resis-
tor, typically greater than 500Ω, is required on the SDA
bus. SCL operates as only an input. A pullup resistor,
typically greater than 500Ω, is required on SCL if there
are multiple masters on the bus, or if the master in a
single-master system has an open-drain SCL output.
Series resistors in line with SDA and SCL are optional.
Series resistors protect the digital inputs of the
MAX9670/MAX9671 from high-voltage spikes on the
bus lines, and minimize crosstalk and undershoot of the
bus signals.
One data bit is transferred during each SCL cycle. The
data on SDA must remain stable during the high period
of the SCL pulse. Changes in SDA while SCL is high
are control signals (see the START and STOP
Conditions section). SDA and SCL idle high when the
I
SDA and SCL idle high when the bus is not in use. A
master initiates communication by issuing a START
condition. A START condition is a high-to-low transition
on SDA with SCL high. A STOP condition is a low-to-
high transition on SDA while SCL is high (Figure 7). A
START condition from the master signals the beginning
of a transmission to the MAX9670/MAX9671. The mas-
ter terminates transmission, and frees the bus, by issu-
ing a STOP condition. The bus remains active if a
REPEATED START condition is generated instead of a
STOP condition.
Figure 6. I
2
C bus is not busy.
SDA
SCL
t
HD, STA
2
C Serial-Interface Timing Diagram
Volume Control for Dual SCART Connectors
CONDITION
START
Low-Power Audio/Video Switch with Audio
______________________________________________________________________________________
t
LOW
START and STOP Conditions
t
R
t
t
SU, DAT
HIGH
t
F
t
HD, DAT
Bit Transfer
t
SU, STA
START CONDITION
The MAX9670/MAX9671 recognize a STOP condition at
any point during data transmission except if the STOP
condition occurs in the same high pulse as a START
condition. For proper operation, do not send a STOP
condition during the same SCL high pulse as the
START condition.
The slave address is defined as the 7 most significant
bits (MSBs) followed by the read/write (R/W) bit. Set the
R/W bit to 1 to configure the MAX9670/MAX9671 to
read mode. Set the R/W bit to 0 to configure the
MAX9670/MAX9671 to write mode. The slave address
is always the first byte of information sent to the
MAX9670/MAX9671 after a START or a REPEATED
START condition. The MAX9670/MAX9671 slave
address is configurable with DEV_ADDR. Table 3
shows the possible slave addresses for the
MAX9670/MAX9671.
Figure 7. START, STOP, and REPEATED START Conditions
REPEATED
SDA
SCL
t
HD, STA
S
t
SP
t
SU, STO
Sr
Early STOP Conditions
CONDITION
STOP
Slave Address
t
BUF
CONDITION
START
P
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