GAL6002B-15LP Lattice, GAL6002B-15LP Datasheet - Page 4

• Manufacturer Part Number: GAL6002B-15LP
• Description: SPLD GAL Family 38 Macro Cells EECMOS Technology 5V 24-Pin PDIP
• Manufacturer: Lattice

Specifications of GAL6002B-15LP

• Package: 24PDIP
• Family Name: GAL
• Number Of Macro Cells: 38
• Maximum Propagation Delay Time: 15 ns
• Typical Operating Supply Voltage: 5 V
• Maximum Number Of User I/os: 10
• Re-programmability Support: Yes

Input Macrocell JEDEC Fuse Numbers
INSYNC
ILMC and IOLMC Configurations
8218
8220
8222
8224
8226
8228
8230
8232
8234
8236
INLATCH
INPUT
or I/O
8219
8221
8223
8225
8227
8229
8231
8233
8235
8237
ILMC
0
1
2
3
4
5
6
7
8
9
ICLK
Generic Logic Block Diagram
E
D
D
LATCH
REG.
ILMC/IOLMC
Q
Q
INVALID
4
I/O Macrocell JEDEC Fuse Numbers
IOSYNC
8238
8240
8242
8244
8246
8248
8250
8252
8254
8256
LATCH(i)
Specifications GAL6002
1
1
0
0
MUX
IOLATCH
0
1
0
1
8239
8241
8243
8245
8247
8249
8251
8253
8255
8257
ISYN(i)
IOLMC
9
8
7
6
5
4
3
2
1
0
ARRAY
AND