MT4C4M4A1TG-5 Micron Technology Inc, MT4C4M4A1TG-5 Datasheet
MT4C4M4A1TG-5
Specifications of MT4C4M4A1TG-5
Related parts for MT4C4M4A1TG-5
MT4C4M4A1TG-5 Summary of contents
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... A11 on 4K refresh options MEG x 4 FPM DRAM PART NUMBERS DJ TG PART NUMBER MT4LC4M4B1DJ-6 -5 MT4LC4M4B1DJ-6 S 3.3V -6 MT4LC4M4B1TG-6 MT4LC4M4B1TG-6 S 3.3V None MT4LC4M4A1DJ MT4LC4M4A1DJ-6 S 3.3V MT4LC4M4A1TG-6 MT4C4M4A1TG-6 S 3.3V MT4C4M4B1DJ-6 MT4C4M4B1DJ-6 S MT4C4M4B1TG-6 MT4C4M4B1TG-6 S MT4C4M4A1DJ-6 MT4C4M4A1DJ-6 S MT4C4M4A1TG-6 MT4C4M4A1TG CAC RP 25ns 13ns 30ns 30ns ...
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... GENERAL DESCRIPTION The 4 Meg x 4 DRAM is a randomly accessed, solid- state memory containing 16,777,216 bits organized configuration. RAS# is used to latch the row address (first 11 bits for 2K and first 12 bits for 4K). Once the page has been opened by RAS#, CAS# is used to latch the column address (the latter 11 bits for 2K and the latter 10 bits for 4K ...
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... CONTROLLER REFRESH A7 COUNTER A10 ROW- A11 ADDRESS 12 BUFFERS (12) NO. 1 CLOCK RAS# GENERATOR 4 Meg x 4 FPM DRAM D49_5V.p65 – Rev. 5/ 2,048 2,048 2,048 11 2,048 2,048 10 4,096 12 4,096 4,096 3 Micron Technology, Inc., reserves the right to change products or specifications without notice. OBSOLETE 4 MEG x 4 FPM DRAM ...
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... V Any output at V OUT OUT DQ is disabled and in High-Z state 4 Meg x 4 FPM DRAM D49_5V.p65 – Rev. 5/00 *Stresses greater than those listed under “Absolute Maxi- mum Ratings” may cause permanent damage to the SS device. This is a stress rating only, and functional opera- ...
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... A0-A11, OE# and 0.2V or 0.2V (D may be left open CAPACITANCE (Note: 6) PARAMETER Input Capacitance: Address pins Input Capacitance: RAS#, CAS#, WE#, OE# Input/Output Capacitance Meg x 4 FPM DRAM D49_5V.p65 – Rev. 5/00 2K SYM SPEED REFRESH REFRESH REFRESH REFRESH UNITS NOTES I ALL ALL 500 ...
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... RAS# pulse width during Self Refresh Random READ or WRITE cycle time RAS# to CAS# delay time READ command hold time (referenced to CAS#) READ command setup time Refresh period (2,048 cycles) Refresh period (4,096 cycles) 4 Meg x 4 FPM DRAM D49_5V.p65 – Rev. 5/00 -5 SYMBOL MIN MAX MIN ...
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... Transition time (rise or fall) WRITE command hold time WRITE command hold time (referenced to RAS#) WE# command setup time WRITE command pulse width WE# hold time (CBR Refresh) WE# setup time (CBR Refresh) 4 Meg x 4 FPM DRAM D49_5V.p65 – Rev. 5/00 -5 SYMBOL MIN MAX MIN ...
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... RAD (MAX) was specified as a reference point t only. If RAD was greater than the specified t RAD (MAX) limit, then access time was con- 4 Meg x 4 FPM DRAM D49_5V.p65 – Rev. 5/00 . trolled exclusively by = +3.3V or 5.0V; CC longer applied). With or without the (MAX) limit, be met ...
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... CAC 13 t CAH 8 t CAS 8 10,000 t CLZ 0 t CRP 5 t CSH Meg x 4 FPM DRAM D49_5V.p65 – Rev. 5/00 READ CYCLE RAS t CSH t RSH t RCD t CAS RAD t RAH t ASC t CAH COLUMN t RCS RAC t CAC t CLZ OPEN -6 MAX UNITS SYMBOL t 30 ...
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... CAH 8 t CAS 8 10,000 t CRP 5 t CSH 38 t CWL RAD 9 4 Meg x 4 FPM DRAM D49_5V.p65 – Rev. 5/00 EARLY WRITE CYCLE RAS t CSH t RSH t RCD t CAS RAD t RAH t ASC t CAH COLUMN t CWL t RWL t WCR t WCS t WCH VALID DATA -6 MAX ...
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... CAS 8 10,000 t CLZ 0 t CRP 5 t CSH 38 t CWD 28 t CWL Meg x 4 FPM DRAM D49_5V.p65 – Rev. 5/00 READ-WRITE CYCLE t RWC t RAS t CSH t RSH t RCD t CAS RAD t RAH t ASC t CAH COLUMN t RWD t RCS t CWD t AWD RAC t CAC t CLZ OPEN t OE ...
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... CAC 13 t CAH 8 t CAS 8 10,000 t CLZ CPA 28 t CRP 5 t CSH Meg x 4 FPM DRAM D49_5V.p65 – Rev. 5/00 FAST-PAGE-MODE READ CYCLE t RASP RCD t CAS ASC t CAH t ASC COLUMN COLUMN t RCS t RCH RAC t CAC t OFF t CLZ t CLZ VALID DATA MAX ...
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... CAH 8 t CAS 8 10,000 CRP 5 t CSH 38 t CWL Meg x 4 FPM DRAM D49_5V.p65 – Rev. 5/00 FAST-PAGE-MODE EARLY WRITE CYCLE t RASP RCD t CAS ASC t CAH t ASC COLUMN COLUMN t CWL t WCH t WCS WCR VALID DATA VALID DATA -6 MAX UNITS SYMBOL t 45 ...
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... CPA 28 t CRP 5 t CSH 38 t CWD 28 t CWL NOTE for LATE WRITE only. 4 Meg x 4 FPM DRAM D49_5V.p65 – Rev. 5/00 FAST-PAGE-MODE READ-WRITE CYCLE t RASP t CSH NOTE 1 t RCD t CAS ASC t CAH t ASC COLUMN COLUMN t RWD t RCS t CWL AWD t CWD ...
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... CLZ CRP 5 t CSH 38 t CWL NOTE not drive data prior to tristate. 4 Meg x 4 FPM DRAM D49_5V.p65 – Rev. 5/00 (Pseudo READ-MODIFY-WRITE) t RASP t CSH t RCD t CAS RAD t ASC t CAH COLUMN t RCS t CAC t CLZ t OFF VALID OPEN DATA RAC -6 MAX UNITS ...
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... CRP 5 t CSR 5 t RAH 9 NOTE: 1. End of CBR REFRESH cycle. 4 Meg x 4 FPM DRAM D49_5V.p65 – Rev. 5/00 RAS#-ONLY REFRESH CYCLE (OE# and WE# = DON’T CARE RAS t RAH ROW OPEN CBR REFRESH CYCLE (Addresses and OE# = DON’T CARE) t RAS t RP NOTE 1 ...
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... CHR 8 t CLZ 0 t CRP NOTE HIDDEN REFRESH may also be performed after a WRITE cycle. In this case, WE# is LOW and OE# is HIGH. 4 Meg x 4 FPM DRAM D49_5V.p65 – Rev. 5/00 HIDDEN REFRESH CYCLE (WE# = HIGH; OE# = LOW) t RAS RCD t RSH RAD t ASC t CAH COLUMN ...
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... NOTE: 1. Once RASS (MIN) is met and RAS# remains LOW, the DRAM will enter self refresh mode Once RPS is satisfied, a complete burst of all rows should be executed if RAS#-only or burst CBR refresh is used. 4 Meg x 4 FPM DRAM D49_5V.p65 – Rev. 5/00 SELF REFRESH CYCLE (Addresses and OE# = DON’ ...
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... DAMBAR PROTRUSION SEATING PLANE NOTE: 1. All dimensions in inches (millimeters) 2. Package width and length do not include mold protrusion; allowable mold protrusion is .01" per side. 4 Meg x 4 FPM DRAM D49_5V.p65 – Rev. 5/00 24/26-PIN PLASTIC SOJ (300 mil) .679 (17.25) .673 (17.09) .032 (0.81) ...
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... S. Federal Way, P.O. Box 6, Boise, ID 83707-0006, Tel: 208-368-3900 E-mail: prodmktg@micron.com, Internet: http://www.micron.com, Customer Comment Line: 800-932-4992 Micron is a registered trademark of Micron Technology, Inc. 4 Meg x 4 FPM DRAM D49_5V.p65 – Rev. 5/00 24/26-PIN PLASTIC TSOP (300 mil) .367 (9.32) ...