CY7C09289-9AI Cypress Semiconductor Corp, CY7C09289-9AI Datasheet - Page 10

• Manufacturer Part Number: CY7C09289-9AI
• Description: SRAM Chip Sync Dual 5V 1M-Bit 64K x 16 20ns/9ns 100-Pin TQFP
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C09289-9AI

• Package: 100TQFP
• Timing Type: Synchronous
• Density: 1 Mb
• Data Rate Architecture: SDR
• Typical Operating Supply Voltage: 5 V
• Number Of I/o Lines: 16 Bit
• Number Of Ports: 2
• Number Of Words: 64K

Switching Waveforms
Pipelined Read-to-Write-to-Read (OE = V
Pipelined Read-to-Write-to-Read (OE Controlled)
Notes:
Document #: 38-06040 Rev. *A
25. Output state (HIGH, LOW, or High-Impedance) is determined by the previous cycle control signals.
26. CE
27. During “No Operation,” data in memory at the selected address may be corrupted and should be rewritten to ensure data integrity.
ADDRESS
ADDRESS
DATA
DATA
DATA
DATA
0
CLK
R/W
CLK
R/W
CE
CE
CE
CE
and ADS = V
OUT
OUT
OE
IN
IN
0
1
0
1
t
t
t
t
t
t
SW
SC
SA
SW
SC
SA
IL
; CE
A
A
1
n
, CNTEN, and CNTRST = V
n
t
t
CH2
CH2
(continued)
t
t
t
CYC2
t
t
CYC2
t
t
t
HW
HC
HA
HW
HC
HA
t
t
CL2
CL2
A
A
READ
READ
n+1
n+1
t
t
CD2
CD2
IL
)
IH
[18, 25, 26, 27]
.
Q
t
t
SW
OHZ
n
[18, 25, 26, 27]
Q
n
t
SW
t
SD
D
A
A
n+2
n+2
t
n+2
HW
t
t
CKHZ
NO OPERATION
HD
t
HW
t
WRITE
SD
A
D
A
D
n+3
n+3
n+2
n+2
t
HD
WRITE
A
A
n+4
n+3
t
t
CKLZ
CKLZ
CY7C09279/89
CY7C09379/89
READ
READ
A
A
n+5
n+4
t
Page 10 of 18
t
CD2
CD2
Q
n+4
Q
n+3
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