XC5204-3PQ160C Xilinx Inc, XC5204-3PQ160C Datasheet - Page 46

• Manufacturer Part Number: XC5204-3PQ160C
• Description: FPGA XC5200 Family 6K Gates 480 Cells 83MHz 0.5um (CMOS) Technology 5V 160-Pin PQFP
• Manufacturer: Xilinx Inc

Specifications of XC5204-3PQ160C

• Package: 160PQFP
• Family Name: XC5200
• Device Logic Units: 120
• Device System Gates: 6000
• Number Of Registers: 480
• Maximum Internal Frequency: 83 MHz
• Typical Operating Supply Voltage: 5 V
• Maximum Number Of User I/os: 124
• Re-programmability Support: Yes

XC5200 Series Field Programmable Gate Arrays
XC5200 Global Buffer Switching Characteristic Guidelines
Testing of the switching parameters is modeled after testing methods specified by MIL-M-38510/605. All devices are 100%
functionally tested. Since many internal timing parameters cannot be measured directly, they are derived from benchmark
timing patterns. The following guidelines reflect worst-case values over the recommended operating conditions. For more
detailed, more precise, and more up-to-date timing information, use the values provided by the timing calculator and used
in the simulator.
XC5200 Longline Switching Characteristic Guidelines
Testing of the switching parameters is modeled after testing methods specified by MIL-M-38510/605. All devices are 100%
functionally tested. Since many internal timing parameters cannot be measured directly, they are derived from benchmark
timing patterns. The following guidelines reflect worst-case values over the recommended operating conditions. For more
detailed, more precise, and more up-to-date timing information, use the values provided by the timing calculator and used
in the simulator.
7-128
Global Signal Distribution
TBUF driving a Longline
Note:
From pad through global buffer, to any clock (CK)
I to Longline, while TS is Low; i.e., buffer is constantly ac-
tive
TS going Low to Longline going from floating High or Low
to active Low or High
TS going High to TBUF going inactive, not driving
Longline
TS
I
TBUF
1. Die-size-dependent parameters are based upon XC5215 characterization. Production specifications will vary with array
size.
O
Product Obsolete or Under Obsolescence
Description
Description
Symbol
T
Symbol
BUFG
T
T
T
OFF
ON
IO
Speed Grade
Speed Grade
XC5202
XC5204
XC5206
XC5210
XC5215
Device
XC5202
XC5204
XC5206
XC5210
XC5215
XC5202
XC5204
XC5206
XC5210
XC5215
XC52xx
Device
Max
10.5
Max
(ns)
(ns)
9.1
9.3
9.4
9.4
6.0
6.4
6.6
6.6
7.3
7.8
8.3
8.4
8.4
8.9
3.0
-6
-6
November 5, 1998 (Version 5.2)
Max
Max
(ns)
(ns)
8.5
8.7
8.8
8.8
9.9
3.8
4.1
4.2
4.2
4.6
5.6
5.9
6.0
6.0
6.3
2.8
-5
-5
Max
(ns)
Max
(ns)
8.0
8.2
8.3
8.5
9.8
3.0
3.2
3.3
3.3
3.8
4.7
4.9
5.0
5.0
5.3
2.6
-4
-4
Max
Max
(ns)
(ns)
6.9
7.6
7.7
7.7
9.6
2.0
2.3
2.7
2.9
3.2
4.0
4.3
4.4
4.4
4.5
2.4
-3
-3
R