AD6650ABCZ Analog Devices Inc, AD6650ABCZ Datasheet - Page 16

• Manufacturer Part Number: AD6650ABCZ
• Description: DIVERSITY IF-TO-BASEBAND GSM/EDGE NARROW-BAND RECEIVER
• Manufacturer: Analog Devices Inc

AD6650
THEORY OF OPERATION
ANALOG FRONT END
The AD6650 is a mixed-signal front-end (MxFE®) component
intended for direct IF sampling radios requiring high dynamic
range. It is optimized for the demanding performance require-
ments of GSM and EDGE.
The AD6650 has five signal processing stages: a digital VGA,
I/Q demodulators, seventh-order low-pass filters, dual ADCs,
and digital filtering. Programming and control are accom-
plished via a microprocessor interface.
DVGA
A gain-ranging digital VGA is used to extend the dynamic
range of the ADC and minimize signal clipping at the ADC
input. The VGA has a maximum gain of 36 dB with a nominal
step size of 0.094 dB. The amplifier serves as the input stage to
the AD6650 and has a nominal input impedance of 200 Ω and a
4 dBm maximum input.
I/Q Demodulators
Frequency translation is accomplished with I/Q demodulators.
Real data entering this stage is separated into in-phase (I) and
quadrature (Q) components. This stage translates the input
signal from an intermediate frequency (IF) of 70 MHz to
260 MHz to a baseband frequency.
Low-Pass Filters
In each I/Q signal path is a seventh-order low-pass active filter
with 3.5 MHz bandwidth and automatic resistance-capacitance
calibration to ±4%. This filter typically offers greater than 70 dB
of alias rejection at 25.9 MHz.
Dual ADCs
The AD6650 has two ADCs. Each is implemented with an
AD9238
in the I and Q signals at 26 MSPS each. The full-scale input
power into the ADC is 4 dBm.
DIGITAL BACK END
The 12-bit ADC data goes through the coarse dc correction
block, which performs a one-time calibration of the dc offsets in
the I and Q paths. The output of this block drives the automatic
gain control (AGC) loop block, which adjusts the digitally
controlled VGA in the analog path. The AGC adjusts the amplitude
of the incoming signal of interest to a programmable level and
prevents the ADC from clipping. The gain of the VGA is subtracted
in the relinearization block so that externally the AD6650 appears
to have constant gain. For example, if the VGA must increase the
gain from 20 dB to 30 dB due to a decrease in the signal power,
the relinearization word changes from a −20 dB to a −30 dB gain so
core preceded by dual track-and-holds that multiplex
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that the total AD6650 response is unchanged. The 19-bit output of
the AGC block is then decimated and filtered using the CIC4 filter,
the IIR filter, and the programmable RAM coefficient filter (RCF).
Either 16-bit or 24-bit data is output through the serial port.
With the 36 dB VGA gain, 12-bit ADC performance, and
approximately 21 dB of processing gain, the AD6650 is capable
of delivering approximately 116 dB of dynamic range or 19 bits
of performance. For this reason, it is recommended that the
24-bit serial output be used so that dynamic range is not lost.
A block diagram of the digital signal path is shown in Figure 21.
DC CORRECTION
The dc offset in the analog path of the AD6650 comes from
three sources: the analog baseband filters, the ADCs, and the
LO leakage of the mixers. The dc offsets of the analog filters and
the ADCs dominate that of the LO leakage. The dc offsets on
the I and Q data for both Channel A and Channel B are
different because they use different analog paths. Each path is
corrected independently.
The typical uncorrected dc offset is between −32 dB and −35 dB
relative to full scale (dBFS) of the ADC. When the AGC range is
considered along with this offset, the dc is effectively slid down by
the gain setting so that it is approximately −68 dBFS to −71 dBFS
or smaller when the AD6650 is in maximum gain.
COARSE
DITHER
GEN.
DCC
–100
–120
–130
–140
–150
–160
–170
–180
–110
–10
–20
–30
–40
–50
–60
–70
–80
–90
RELIN
CTRL
AGC
0
Figure 21. Channel Digital Signal Path
ORDER
DC OFFSET
Figure 22. Uncorrected DC Offset
CIC
4
TH
FILTER
LP
ORDER
7
IIR
FREQUENCY (MHz)
TH
PROG.
(RCF)
FIR
FINE
DCC
BIST
SPORT