WJCE6355 Intel, WJCE6355 Datasheet
WJCE6355
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WJCE6355 Summary of contents
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... Document no. D55755-002 Ordering Information WJCE6355 882211 WJCE6355 S L9G7 882212 64 Pin LQFP* Tape and Reel * Pb Free Matte Tin (RoHS compliant) Working temperature range: -40°C to +85°C A high performance 10 bit on-chip ADC is used to sample the MHz IF analog signal ...
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... Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an ordering number and are referenced in this document, or other Intel literature may be obtained by calling 1-800-548-4725 or by visiting Intel's website at http://www.intel.com. ...
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... MOCLKINV = 1......................................................................................................................................................................................................18 3.2.5 MOCLKINV = 0......................................................................................................................................................................................................19 4 Electrical Characteristics .............................................................................................................................................................21 4.1 Operating Conditions...................................................................................................................................................... 21 4.2 Absolute Maximum Ratings........................................................................................................................................ 21 4.3 DC Electrical Characteristics....................................................................................................................................... 22 4.4 AC Electrical Characteristics....................................................................................................................................... 22 4.5 Crystal Specification and External Clocking ...................................................................................................... 23 4.5.1 Selection of External Components...........................................................................................................................................................24 4.5.1.1 Loop Gain Equation..............................................................................................................................................................................24 CE6355 Table of Contents Intel Corporation Data Sheet 3 ...
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... Data Sheet 4.5.1.2 List of Equation Parameters ..........................................................................................................................................................24 4.5.1.3 Calculating Crystal Power Dissipation ......................................................................................................................................25 4.5.1.4 Capacitor Values ...................................................................................................................................................................................25 4.5.1.5 Oscillator/Clock Application Notes ..............................................................................................................................................25 5 Application Circuit........................................................................................................................................................................... 27 4 CE6355 Table of Contents Intel Corporation ...
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... Figure 10 - MPEG Timing - MOCLKINV = Figure 11 - VIN & VIN equivalent circuit for inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Figure 12 - VIN & VIN input impedance (approximate Figure 13 - RFLEV equivalent circuit for input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Figure 14 - Crystal Oscillator Circuit Figure 15 - External Clocking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Figure 16 - Typical Application Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 CE6355 List of Figures Intel Corporation Data Sheet 5 ...
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... Data Sheet Table 1 - Pin Names - numeric . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 2 - Pin Names - alphabetical order . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 3 - 2-wire bus address .15 Table 4 - Timing of 2-Wire Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 6 CE6355 List of Tables Intel Corporation ...
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... Pin & Package Details 1.1 Package dimensions Figure 2 - Package dimensions 1.2 Pin Outline Figure 3 - Pin Outline CE6355 Intel Corporation Data Sheet 7 ...
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... Vss 58 10 SLEEP Vss 63 SMTEST 44 Vss 61 11 STATUS Vss 47 2 Vdd Vss 48 13 Vdd Vss 27 33 Vdd XTI 22 45 Vdd XTO Intel Corporation Function MDO0 MDO1 MDO2 MDO3 MDO4 Vdd Vss MDO5 MDO6 MDO7 CVdd Vss MOCLK BKERR MICLK CVdd Pin ...
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... Serial data tuner Primary AGC Secondary AGC General purpose I/O Device reset Crystal oscillator mode PLL analog test positive input negative input RF level PLL supply Core logic power I/O ring power Intel Corporation Data Sheet I/O Type 3 3.3 O CMOS Tristate 3.3 ...
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... Data Sheet Pin Description Table (continued) Pin No Name 14, 20, 25, Vss 38, 40, 46, 55 AVdd 29, 32 AGnd 33 Vdd 10 CE6355 Pin Description Core and I/O ground ADC analog supply 2nd ADC supply Intel Corporation I/O Type 1 3.3 ...
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... The former provides the bit error rate (BER) at the OFDM output. The latter is the more useful measure as it gives the Viterbi output BER. The error collecting intervals of these are programmable over a very wide range. CE6355 Intel Corporation Data Sheet 11 ...
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... The first step of the demodulation process is to convert this signal to a complex (in-phase and quadrature) signal in baseband. A correction for spectral inversion is implemented during this conversion process. Note also that the CE6355 has control mechanisms to search automatically for an unknown spectral inversion status. 12 CE6355 Intel Corporation ...
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... ETS 300 744. In addition, the first eight bits of the cell identifier are contained in even frames and the second eight bits of the cell identifier are in odd frames. The TPS module extracts all the TPS data, and presents these to the host processor in a structured manner. CE6355 Intel Corporation Data Sheet 13 ...
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... MPEG data can be output in parallel or serial mode. The output clock frequency is automatically chosen to present the MPEG data as uniformly spaced as possible to the transport processor. This frequency depends on the guard ratio, constellation, hierarchy and code rate. There is also an option for the data to be extracted from the CE6355 with a clock provided by the user. 14 CE6355 Intel Corporation ...
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... Please note that in this configuration, this pin is an output only and therefore does not allow a clock-hold function in the slave device. CE6355 Table 3 - 2-wire bus address ADDR[7] ADDR[6] ADDR[5] Gnd Gnd SADD[4] Gnd Gnd Gnd * , GPP1 pin 36 = DATA2. Intel Corporation Data Sheet ADDR[4] ADDR[3] ADDR[2] SADD[3] SADD[2] SADD[1] Vdd Vdd Vdd ADDR[1] SADD[0] Vdd ...
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... Start condition W Stop condition R Acknowledge NA CE6355 output RADD A DATA A DATA (reg n) (reg n+1) A DATA A DATA NA (reg 1) (reg DEVICE R A DATA ADDRESS (reg n) t LOW HD;DAT HIGH SU;DAT HD;STA Intel Corporation Write (= 0) Read (= 1) NOT Acknowledge Register Address DATA NA P (reg n+ SU;STO SU;STA ...
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... SU;DAT 4.0 t SU;STO 188 byte packet output 184 Transport packet bytes Transport Packet Header 4 bytes TEI Intel Corporation Values with 20.48 MHz * clock Max. Min. Max. 100 0 400 1.3 0.6 1.3 0.6 0.6 3.45 0 0.9 100 † 1000 20 + 0.1C 300 b † ...
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... MOCLK frequency = 45.06 MHz. 3.2.4 MOCLKINV 1 = Delay conditions Parameter Maximum Data output delay t 3.0 D Setup Time t 7.0 SU Hold Time t 7 CE6355 188 byte packet Output load = 10pF Output load = 10pF. Units Minimum 1.0 10.0 ns 10.0 Intel Corporation 1st byte packet n+1 Ti ...
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... Data output delay t 3.0 D Setup Time t 18.0 SU Hold Time t 1.0 H The hold time is better when MOCLKINV = 1, therefore this should be used if possible. Figure 10 - MPEG Timing - MOCLKINV = 0 MOCLK } MDO MOSTRT MOVAL BKERRB BKERR CE6355 Units Minimum 1.0 20 Intel Corporation Data Sheet 19 ...
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... Data Sheet 20 CE6355 Intel Corporation ...
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... Idd C XTI ** f CLK Symbol Min. Vdd CVdd VI -0.3 Vdd + 0.3 VO Vdd + 0.3 ±2000 ±800 TSTG -55 150 TOP -40 TJ 125 Intel Corporation Min. Typ. Max. 3.0 3.3 3.6 1.62 1.8 1.98 1 170 16.00 20.48 25.00 400 -40 85 Max. Unit Conditions +3 ...
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... RESET All inputs SLEEP, SMTEST, MICLK, CLK1, OSCMODE SADD(4:0), DATA1, GPP(3:0) Pins Min. Typ. Max. Unit * 0.8 0.0 Vdd RFLEV VIN, VIN 25k RFLEV Intel Corporation Symbol Min. Typ. Max. Vdd 3.0 3.3 3.6 CVdd 1.62 1.8 1.98 Idd 170 C 300 VOH 2 ...
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... Figure 12 - VIN & VIN input impedance (approximate) Figure 13 - RFLEV equivalent circuit for input 4.5 Crystal Specification and External Clocking Parallel resonant fundamental frequency (preferred) Tolerance over operating temperature range Tolerance overall CE6355 20.4800 MHz ± 150 ppm ± 200 ppm Intel Corporation Data Sheet 23 ...
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... Rf 2.3MΩ - internal feedback resistor ESR maximum equivalent series resistance of crystal - given by crystal manufacturer (Ω) f fundamental frequency of crystal (Hz) 24 CE6355 20 pF 0.4 mW max <40 Ω XTI XT0 XTI out .ESR Intel Corporation OSCMODE ...
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... AC coupling of a single ended external clock to XTI, with OSCMODE = 0, is not recommended. The duty cycle of the CE6355 .ESR when (2.π. par12 tend to reduce the influence of circuit variations and tolerances on L tend to reduce startup time and crystal power dissipation. Care must however be L Intel Corporation Data Sheet = out par (standard values for ...
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... CVdd, and the peak-to-peak signal amplitude Vpp must be >100 mV recommended that differential clock signals have V of ≥ 390 Ω in series with XTI or XTO may be required to limit the current taken from or supplied to the clock sources. 26 CE6355 = 1.0V. For Vpp > 400 mV a resistor CM Intel Corporation for XTI CM CM ...
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... Application Circuit Figure 16 - Typical Application Circuit CE6355 Intel Corporation Data Sheet 27 ...
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... Data Sheet 28 CE6355 Intel Corporation ...