89TTM553BL Integrated Device Technology (Idt), 89TTM553BL Datasheet - Page 8
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89TTM553BL
Manufacturer Part Number
89TTM553BL
Description
ATM Traffic Management 10Gbps 1.8V 960-Pin FCBGA
Manufacturer
Integrated Device Technology (Idt)
Datasheet
1.IDT89TTM553BL.pdf
(30 pages)
Specifications of 89TTM553BL
Package
960FCBGA
Traffic Class
VBR
Throughput
10000 Mbps
Typical Operating Supply Voltage
1.8 V
Minimum Operating Supply Voltage
1.71 V
Maximum Operating Supply Voltage
1.89 V
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
89TTM553BL
Manufacturer:
NUVOTON
Quantity:
13
IDT 89TTM553
FLQS_DIN[14:0]
FLQS_DIN_PRTY
FLQS_DOUT[19:0]
FLQS_DOUT_PRTY
FLQS_CLKIN
FLQS_CLKOUT
FLQS_TIC_IN
FLQS_TIC_OUT
FLQS_VREF
ZBUS_AVALID_N
ZBUS_CLK
ZBUS_AD[15:0]
ZBUS_DEVID[4:0]
ZBUS_DVALID_N
ZBUS_GNT_N
ZBUS_INT_N[2:0]
ZBUS_PRTY
ZBUS_DIR
ZBUS_REQ_N
Signal Name
Signal Name
1.5V HSTL Class 1
1.5V HSTL Class 1
1.5V HSTL Class 1
1.5V HSTL Class 1
1.5V HSTL Class 1
1.5V HSTL Class 1
0.75V
3.3V LVTTL,
12mA drive,
internal pullup
3.3V,
no internal pullup
3.3V LVTTL,
12mA drive,
internal pullup
3.3V,
internal pullup
3.3V LVTTL,
12mA drive,
internal pullup
3.3V,
internal pullup
3.3V LVTTL,
12mA drive
3.3V LVTTL,
12mA drive,
internal pullup
3.3V LVTTL,
12mA drive
3.3V LVTTL,
12mA drive
I/O Type
I/O Type
Table 8 89TTM552/89TTM553 Interface
Table 9 Processor Interface (ZBus)
Dir.
Dir.
—
O
O
O
B
B
B
O
B
O
O
I
I
I
I
I
I
8 of 30
175 MHz
175 MHz
175 MHz
175 MHz
175 MHz
175 MHz
Freq.
Freq.
66 MHz
66 MHz
66 MHz
66 MHz
66 MHz
66 MHz
66 MHz
66 MHz
66 MHz
66 MHz
33 or
33 or
33 or
33 or
33 or
33 or
33 or
33 or
33 or
33 or
—
Control serial interface to 89TTM552
(15 signal lines + 1 parity line)
Control serial interface to 89TTM552
(20 signal lines + 1 parity line)
Clock input from 89TTM552
Clock output to 89TTM552
Cell time tic input from 89TTM552
Cell time tic out to 89TTM552
HSTL reference. Nominally V
ZBus address valid flag (active low)
ZBus clock input (up to 66 MHz)
ZBus 16-bit multiplexed address/data bus
Used for ZBus device identification
ZBus data valid flag (active low)
ZBus grant (active low)
ZBus device interrupt (active low)
ZBus parity over address/data; one parity bit for 16 bits
ZBus write/read flag
ZBus master cycle request (active low)
Remarks
Remarks
DDQ
/ 2, so connect to 0.75 V
March 3, 2005