STM8L152C8U6 STMicroelectronics, STM8L152C8U6 Datasheet - Page 114
STM8L152C8U6
Manufacturer Part Number
STM8L152C8U6
Description
IC MCU 8BIT 64KB FLASH 48QFPN
Manufacturer
STMicroelectronics
Series
STM8L EnergyLiter
Datasheet
1.STM8L151C8U6.pdf
(126 pages)
Specifications of STM8L152C8U6
Core Processor
STM8
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, IR, LCD, POR, PWM, WDT
Number Of I /o
41
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 25x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-UFQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
497-11478
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
STM8L152C8U6
Manufacturer:
ST
Quantity:
75
Company:
Part Number:
STM8L152C8U6
Manufacturer:
STMicroelectronics
Quantity:
10 000
Electrical parameters
114/126
Figure 42. ADC1 accuracy characteristics
Figure 43. Typical connection diagram using the ADC
1. Refer to
2. C
General PCB design guidelines
Power supply decoupling should be performed as shown in
depending on whether V
capacitors should be used. They should be placed as close as possible to the chip.
4095
4094
4093
pad capacitance (roughly 7 pF). A high C
this, f
7
6
5
4
3
2
1
parasitic
0
V
SSA
[1LSB
ADC
Table 53
1
represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the
E
should be reduced.
O
IDEAL
2
=
V
for the values of R
4096
3
REF+
4
(or
REF+
V
5
1 LSB
4096
DDA
E
6
T
depending on package)]
IDEAL
is connected to V
Doc ID 17943 Rev 4
E
AIN
7
L
(2)
and C
parasitic
E
D
ADC
4093 4094 4095 4096
(3)
value will downgrade conversion accuracy. To remedy
.
DDA
(1)
E
G
or not. Good quality ceramic 10 nF
V
DDA
(1) Example of an actual transfer curve
(2) The ideal transfer curve
(3) End point correlation line
E
between the actual and the ideal transfer curves.
E
transition and the first ideal one.
E
transition and the last actual one.
E
between actual steps and the ideal one.
E
between any actual transition and the end point
correlation line.
T
O
G
D
L
=Total Unadjusted Error: maximum deviation
=Integral Linearity Error: maximum deviation
=Offset Error: deviation between the first actual
=Gain Error: deviation between the last ideal
=Differential Linearity Error: maximum deviation
Figure 44
STM8L15xx8, STM8L15xR6
or
Figure
45,
ai14395b