STM8L152C8U6 STMicroelectronics, STM8L152C8U6 Datasheet - Page 61
STM8L152C8U6
Manufacturer Part Number
STM8L152C8U6
Description
IC MCU 8BIT 64KB FLASH 48QFPN
Manufacturer
STMicroelectronics
Series
STM8L EnergyLiter
Datasheet
1.STM8L151C8U6.pdf
(126 pages)
Specifications of STM8L152C8U6
Core Processor
STM8
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, IR, LCD, POR, PWM, WDT
Number Of I /o
41
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 25x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-UFQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
497-11478
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
STM8L152C8U6
Manufacturer:
ST
Quantity:
75
Company:
Part Number:
STM8L152C8U6
Manufacturer:
STMicroelectronics
Quantity:
10 000
STM8L15xx8, STM8L15xR6
Table 13.
byte no.
Option
OPT0
OPT1
OPT2
OPT3
OPT4
ROP[7:0] Memory readout protection (ROP)
UBC[7:0] Size of the user boot code area
PCODESIZE[7:0] Size of the proprietary code area
IWDG_HW: Independent watchdog
IWDG_HALT: Independent watchdog off in Halt/Active-halt
WWDG_HW: Window watchdog
WWDG_HALT: Window window watchdog reset on Halt/Active-halt
HSECNT: Number of HSE oscillator stabilization clock cycles
LSECNT: Number of LSE oscillator stabilization clock cycles
Option byte description
0xAA: Disable readout protection (write access via SWIM protocol)
Refer to Readout protection section in the STM8L reference manual (RM0031).
UBC[7:0] Size of the user boot code area
0x00: No UBC
0x01: Page 0 reserved for the UBC and write protected.
...
0xFF: Page 0 to 254 reserved for the UBC and write-protected.
Refer to User boot code section in the STM8L reference manual (RM0031).
0x00: No proprietary code area
0x01: Page 0 reserved for the proprietary code and read/write protected.
...
0xFF: Page 0 to 254 reserved for the proprietary code and read/write protected.
Refer to Proprietary code area (PCODE) section in the STM8L reference manual
(RM0031) for more details.
0: Independent watchdog activated by software
1: Independent watchdog activated by hardware
0: Independent watchdog continues running in Halt/Active-halt mode
1: Independent watchdog stopped in Halt/Active-halt mode
0: Window watchdog activated by software
1: Window watchdog activated by hardware
0: Window watchdog stopped in Halt mode
1: Window watchdog generates a reset when MCU enters Halt mode
0x00 - 1 clock cycle
0x01 - 16 clock cycles
0x10 - 512 clock cycles
0x11 - 4096 clock cycles
0x00 - 1 clock cycle
0x01 - 16 clock cycles
0x10 - 512 clock cycles
0x11 - 4096 clock cycles
Doc ID 17943 Rev 4
Option description
Option bytes
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