STM8L151C3T6 STMicroelectronics, STM8L151C3T6 Datasheet - Page 99

• Manufacturer Part Number: STM8L151C3T6
• Description: IC MCU 8BIT 8KB FLASH 48LQFP
• Manufacturer: STMicroelectronics
• Series: STM8L EnergyLiter

Specifications of STM8L151C3T6

• Core Processor: STM8
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, IR, POR, PWM, WDT
• Number Of I /o: 40
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 28x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 497-11492

STM8L151x2, STM8L151x3
Table 56.
Option
OPT0
OPT1
OPT2
OPT3
OPT4
byte
No.
ROP[7:0] Memory readout protection (ROP)
UBC[7:0] Size of the user boot code area
Reserved
IWDG_HW: Independent watchdog
IWDG_HALT: Independent window watchdog off on Halt/Active-halt
WWDG_HW: Window watchdog
WWDG_HALT: Window window watchdog reset on Halt/Active-halt
HSECNT: Number of HSE oscillator stabilization clock cycles
LSECNT: Number of LSE oscillator stabilization clock cycles
Refer to
Option byte description
0xAA: Disable readout protection (write access via SWIM protocol)
Refer to Readout protection section in the STM8L15x and STM8L16x reference manual (RM0031).
0x00: UBC is not protected.
0x01: Page 0 is write protected.
0x02: Page 0 and 1 reserved for the UBC and write protected. It covers only the interrupt vectors.
0x03: Page 0 to 2 reserved for UBC and write protected.
0x7F to 0xFF - All 128 pages reserved for UBC and write protected.
The protection of the memory area not protected by the UBC is enabled through the MASS keys.
Refer to User boot code section in the STM8L15x and STM8L16x reference manual (RM0031).
0: Independent watchdog activated by software
1: Independent watchdog activated by hardware
0: Independent watchdog continues running in Halt/Active-halt mode
1: Independent watchdog stopped in Halt/Active-halt mode
0: Window watchdog activated by software
1: Window watchdog activated by hardware
0: Window watchdog stopped in Halt mode
1: Window watchdog generates a reset when MCU enters Halt mode
0x00 - 1 clock cycle
0x01 - 16 clock cycles
0x10 - 512 clock cycles
0x11 - 4096 clock cycles
0x00 - 1 clock cycle
0x01 - 16 clock cycles
0x10 - 512 clock cycles
0x11 - 4096 clock cycles
Table 31: LSE oscillator characteristics on page
Doc ID 018780 Rev 2
Option description
71.
Option bytes
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