PIC18F4585-H/P Microchip Technology, PIC18F4585-H/P Datasheet - Page 229
PIC18F4585-H/P
Manufacturer Part Number
PIC18F4585-H/P
Description
IC MCU 8BIT 48KB FLASH 40PDIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheet
1.PIC18F4585-IPT.pdf
(482 pages)
Specifications of PIC18F4585-H/P
Core Processor
PIC
Core Size
8-Bit
Speed
25MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
48KB (24K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.25K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 150°C
Package / Case
40-DIP (0.600", 15.24mm)
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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18.0
The Universal Synchronous Asynchronous Receiver
Transmitter (USART) module is one of the two serial
I/O modules. (USART is also known as a Serial
Communications Interface or SCI.) The USART can be
configured as a full-duplex asynchronous system that
can communicate with peripheral devices, such as
CRT terminals and personal computers. It can also be
configured as a half-duplex synchronous system that
can communicate with peripheral devices, such as A/D
or D/A integrated circuits, serial EEPROMs and so on.
The EUSART module implements additional features,
including automatic baud rate detection and calibra-
tion, automatic wake-up on Sync Break reception and
12-bit Break character transmit. These make it ideally
suited for use in Local Interconnect Network bus (LIN
bus) systems.
The EUSART can be configured in the following
modes:
• Asynchronous (full-duplex) with:
• Synchronous – Master (half-duplex) with
• Synchronous – Slave (half-duplex) with selectable
© 2007 Microchip Technology Inc.
- Auto-Wake-up on character reception
- Auto-Baud calibration
- 12-bit Break character transmission
selectable clock polarity
clock polarity
ENHANCED UNIVERSAL
SYNCHRONOUS RECEIVER
TRANSMITTER (EUSART)
PIC18F2585/2680/4585/4680
Preliminary
The pins of the Enhanced USART are multiplexed with
PORTC. In order to configure RC6/TX/CK and
RC7/RX/DT as a USART:
• bit SPEN (RCSTA<7>) must be set (= 1)
• bit TRISC<7> must be set (= 1)
• bit TRISC<6> must be cleared (= 0) for
The operation of the Enhanced USART module is
controlled through three registers:
• Transmit Status and Control (TXSTA)
• Receive Status and Control (RCSTA)
• Baud Rate Control (BAUDCON)
These are detailed on the following pages in
Register 18-1,
respectively.
Asynchronous and Synchronous Master modes,
or set (= 1) for Synchronous Slave mode
Note:
The EUSART control will automatically
reconfigure the pin from input to output as
needed.
Register 18-2
and
DS39625C-page 227
Register 18-3,
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