ISP1160BD/01,151 NXP Semiconductors, ISP1160BD/01,151 Datasheet - Page 43
ISP1160BD/01,151
Manufacturer Part Number
ISP1160BD/01,151
Description
Manufacturer
NXP Semiconductors
Datasheet
1.ISP1160BD01151.pdf
(89 pages)
Specifications of ISP1160BD/01,151
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Lead Free Status / Rohs Status
Compliant
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Philips Semiconductors
Table 16:
9397 750 13963
Product data
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
HcInterruptEnable register: bit allocation
reserved
R/W
R/W
R/W
R/W
MIE
31
23
15
0
0
0
7
0
10.1.5 HcInterruptEnable register (R/W: 04H/84H)
Each enable bit in the HcInterruptEnable register corresponds to an associated
interrupt bit in the HcInterruptStatus register. The HcInterruptEnable register is used
to control which events generate a hardware interrupt. A hardware interrupt is
requested on the host bus when three conditions occur:
Writing a logic 1 to a bit in this register sets the corresponding bit, whereas writing a
logic 0 to a bit in this register leaves the corresponding bit unchanged. On a read, the
current value of this register is returned.
Code (Hex): 04 — read
Code (Hex): 84 — write
•
•
•
RHSC
R/W
R/W
R/W
R/W
A bit is set in the HcInterruptStatus register
The corresponding bit in the HcInterruptEnable register is set
Bit MasterInterruptEnable is set.
30
22
14
0
0
0
6
0
FNO
R/W
R/W
R/W
R/W
29
21
13
0
0
0
5
0
Rev. 05 — 24 December 2004
R/W
R/W
R/W
R/W
UE
28
20
12
0
0
0
4
0
reserved
reserved
reserved
R/W
R/W
R/W
R/W
RD
27
19
11
0
0
0
3
0
Embedded USB Host Controller
R/W
R/W
R/W
R/W
SF
26
18
10
0
0
0
2
0
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
reserved
R/W
R/W
R/W
R/W
25
17
0
0
9
0
1
0
ISP1160
R/W
R/W
R/W
R/W
SO
24
16
0
0
8
0
0
0
42 of 88
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