AT89C51RD2-RDTIM Atmel, AT89C51RD2-RDTIM Datasheet - Page 93
AT89C51RD2-RDTIM
Manufacturer Part Number
AT89C51RD2-RDTIM
Description
MCU 8-Bit AT89 80C51 CISC 64KB Flash 3.3V/5V 64-Pin VQFP Tray
Manufacturer
Atmel
Datasheet
1.AT89C51RD2-RDTIM.pdf
(137 pages)
- Current page: 93 of 137
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24. Flash/EEPROM Memory
24.1
24.2
4235J–8051–01/08
Features
Flash Programming and Erasure
The Flash memory increases EEPROM and ROM functionality with in-circuit electrical erasure
and programming. It contains 64K bytes of program memory organized respectively in 512
pages of 128 bytes. This memory is both parallel and serial In-System Programmable (ISP). ISP
allows devices to alter their own program memory in the actual end product under software con-
trol. A default serial loader (bootloader) program allows ISP of the Flash.
The programming does not require external dedicated programming voltage. The necessary
high programming voltage is generated on-chip using the standard V
microcontroller.
The 64-K byte Flash is programmed by bytes or by pages of 128 bytes. It is not necessary to
erase a byte or a page before programming. The programming of a byte or a page includes a
self erase before programming.
There are three methods of programming the Flash memory:
• Flash EEPROM Internal Program Memory
• Boot vector allows user provided Flash loader code to reside anywhere in the Flash memory
• Default loader in Boot ROM allows programming via the serial port without the need of a user
• Up to 64K bytes external program memory if the internal program memory is disabled (EA =
• Programming and erasing voltage with standard power supply
• Read/Programming/Erase:
• Typical programming time (64K bytes) is 22s with on chip serial bootloader
• Parallel programming with 87C51 compatible hardware interface to programmer
• Programmable security for the code in the Flash
• 100K write cycles
• 10 years data retention
1. The on-chip ISP bootloader may be invoked which will use low level routines to pro-
2. The Flash may be programmed or erased in the end-user application by calling low-
3. The Flash may be programmed using the parallel method by using a conventional
space. This configuration provides flexibility to the user.
provided loader.
0).
– Byte-wise read without wait state
– Byte or page erase and programming (10 ms)
gram the pages. The interface used for serial downloading of Flash is the UART.
level routines through a common entry point in the Boot ROM.
EPROM programmer. The parallel programming method used by these devices is simi-
lar to that used by EPROM 87C51 but it is not identical and the commercially available
programmers need to have support for the AT89C51RD2/ED2. The bootloader and the
Application Programming Interface (API) routines are located in the BOOT ROM.
AT89C51RD2/ED2
C C
pins of the
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