P87C51RD+4A NXP Semiconductors, P87C51RD+4A Datasheet - Page 27

• Manufacturer Part Number: P87C51RD+4A
• Description: MCU 8-Bit 87C 80C51 CISC 64KB EPROM 3.3V/5V 44-Pin PLCC Tube
• Manufacturer: NXP Semiconductors

Specifications of P87C51RD+4A

• Package: 44PLCC
• Device Core: 80C51
• Family Name: 87C
• Maximum Speed: 16 MHz
• Ram Size: 1 KB
• Program Memory Size: 64 KB
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 8 Bit
• Program Memory Type: EPROM
• Number Of Programmable I/os: 32
• Interface Type: UART
• Operating Temperature: 0 to 70 °C
• Number Of Timers: 3

Philips Semiconductors
(8XC51FX and 8XC51RX+ ONLY)
2000 Aug 07
80C51 8-bit microcontroller family
8K–64K/256–1K OTP/ROM/ROMless, low voltage (2.7V–5.5V),
low power, high speed (33MHz)
NOTE:
* User software should not write 1s to reserved bits. These bits may be used in future 8051 family products to invoke new features. In that case, the reset or inactive value of the
** f
NOTE:
* User software should not write 1s to reserved bits. These bits may be used in future 8051 family products to invoke new features. In that case, the reset or inactive value of the
Symbol
CIDL
WDTE
–
CPS1
CPS0
ECF
Symbol
CF
CR
–
CCF4
CCF3
CCF2
CCF1
CCF0
new bit will be 0, and its active value will be 1. The value read from a reserved bit is indeterminate.
new bit will be 0, and its active value will be 1. The value read from a reserved bit is indeterminate.
OSC
= oscillator frequency
Bit:
Bit Addressable
Bit:
Function
Counter Idle control: CIDL = 0 programs the PCA Counter to continue functioning during idle Mode. CIDL = 1 programs
it to be gated off during idle.
Watchdog Timer Enable: WDTE = 0 disables Watchdog Timer function on PCA Module 4. WDTE = 1 enables it.
Not implemented, reserved for future use.*
PCA Count Pulse Select bit 1.
PCA Count Pulse Select bit 0.
CPS1
PCA Enable Counter Overflow interrupt: ECF = 1 enables CF bit in CCON to generate an interrupt. ECF = 0 disables
that function of CF.
Function
PCA Counter Overflow flag. Set by hardware when the counter rolls over. CF flags an interrupt if bit ECF in CMOD is
set. CF may be set by either hardware or software but can only be cleared by software.
PCA Counter Run control bit. Set by software to turn the PCA counter on. Must be cleared by software to turn the PCA
counter off.
Not implemented, reserved for future use*.
PCA Module 4 interrupt flag. Set by hardware when a match or capture occurs. Must be cleared by software.
PCA Module 3 interrupt flag. Set by hardware when a match or capture occurs. Must be cleared by software.
PCA Module 2 interrupt flag. Set by hardware when a match or capture occurs. Must be cleared by software.
PCA Module 1 interrupt flag. Set by hardware when a match or capture occurs. Must be cleared by software.
PCA Module 0 interrupt flag. Set by hardware when a match or capture occurs. Must be cleared by software.
0
0
1
1
CMOD Address = OD9H
CCON Address = OD8H
CIDL
7
CF
7
CPS0
0
1
0
1
WDTE
Selected PCA Input**
CR
6
6
0
1
2
3
Figure 18. CCON: PCA Counter Control Register
Figure 17. CMOD: PCA Counter Mode Register
–
5
Internal clock, f
Internal clock, f
Timer 0 overflow
External clock at ECI/P1.2 pin (max. rate = f
5
–
CCF4
–
4
4
OSC
OSC
27
CCF3
12
4
–
3
3
CPS1
CCF2
2
2
8XC51RA+/RB+/RC+/RD+/80C51RA+
CCF1
CPS0
OSC
1
1
8)
CCF0
ECF
0
0
8XC51FA/FB/FC/80C51FA
Reset Value = 00XX X000B
Reset Value = 00X0 0000B
Product specification
8XC54/58
SU00035
SU00036