PIC10F206-I/OT Microchip Technology, PIC10F206-I/OT Datasheet - Page 59

• Manufacturer Part Number: PIC10F206-I/OT
• Description: MCU 8-Bit PIC10 PIC RISC 768Byte Flash 2.5V/3.3V/5V 6-Pin SOT-23 Bag
• Manufacturer: Microchip Technology

Specifications of PIC10F206-I/OT

• Package: 6SOT-23
• Device Core: PIC
• Family Name: PIC10
• Maximum Speed: 4 MHz
• Ram Size: 24 Byte
• Program Memory Size: 768 Byte
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 8 Bit
• Program Memory Type: Flash
• Number Of Programmable I/os: 3
• Operating Temperature: -40 to 85 °C
• Number Of Timers: 1

RETLW
Syntax:
Operands:
Operation:
Status Affected: None
Description:
RLF
Syntax:
Operands:
Operation:
Status Affected: C
Description:
RRF
Syntax:
Operands:
Operation:
Status Affected: C
Description:
© 2007 Microchip Technology Inc.
Return with literal in W
[ label ]
0 ≤ k ≤ 255
k → (W);
TOS → PC
The W register is loaded with the
eight-bit literal ‘k’. The program
counter is loaded from the top of
the stack (the return address). This
is a two-cycle instruction.
Rotate Left f through Carry
[ label ]
0 ≤ f ≤ 31
d ∈ [0,1]
See description below
The contents of register ‘f’ are
rotated one bit to the left through
the Carry flag. If ‘d’ is ‘0’, the result
is placed in the W register. If ‘d’ is
‘1’, the result is stored back in
register ‘f’.
Rotate Right f through Carry
[ label ]
0 ≤ f ≤ 31
d ∈ [0,1]
See description below
The contents of register ‘f’ are
rotated one bit to the right through
the Carry flag. If ‘d’ is ‘0’, the result
is placed in the W register. If ‘d’ is
‘1’, the result is placed back in
register ‘f’.
C
C
RETLW k
RRF f,d
register ‘f’
register ‘f’
RLF
f,d
PIC10F200/202/204/206
SLEEP
Syntax:
Operands:
Operation:
Status Affected: TO, PD, RBWUF
Description:
SUBWF
Syntax:
Operands:
Operation:
Status Affected: C, DC, Z
Description:
SWAPF
Syntax:
Operands:
Operation:
Status Affected: None
Description:
Enter SLEEP Mode
[ label ] SLEEP
None
00h → WDT;
0 → WDT prescaler;
1 → TO;
0 → PD
Time-out Status bit (TO) is set. The
Power-down Status bit (PD) is
cleared.
RBWUF is unaffected.
The WDT and its prescaler are
cleared.
The processor is put into Sleep
mode with the oscillator stopped.
See Section 9.9 “Power-Down
Mode (Sleep)” for more details.
Subtract W from f
[ label ] SUBWF f,d
0 ≤ f ≤ 31
d ∈ [0,1]
(f) – (W) → (dest)
Subtract (2’s complement method)
the W register from register ‘f’. If ‘d’
is ‘0’, the result is stored in the W
register. If ‘d’ is ‘1’, the result is
stored back in register ‘f’.
Swap Nibbles in f
[ label ] SWAPF f,d
0 ≤ f ≤ 31
d ∈ [0,1]
(f<3:0>) → (dest<7:4>);
(f<7:4>) → (dest<3:0>)
The upper and lower nibbles of
register ‘f’ are exchanged. If ‘d’ is
‘0’, the result is placed in W
register. If ‘d’ is ‘1’, the result is
placed in register ‘f’.
DS41239D-page 57