P89LPC9321FN NXP Semiconductors, P89LPC9321FN Datasheet - Page 29

• Manufacturer Part Number: P89LPC9321FN
• Description: MCU 8-Bit 89LP 80C51 CISC 8KB Flash 2.5V/3.3V 28-Pin PDIP Tube
• Manufacturer: NXP Semiconductors

NXP Semiconductors
P89LPC9321_1
Product data sheet
7.17.1 Brownout detection
7.17.2 Power-on detection
7.18.1 Idle mode
7.18.2 Power-down mode
7.18 Power reduction modes
The brownout detect function determines if the power supply voltage drops below a
certain level. Enhanced brownout detection has 3 independent functions: BOD reset,
BOD interrupt and BOD EEPROM/FLASH.
BOD reset is always on except in total power-down mode. It could not be disabled in
software. BOD interrupt may be enabled or disabled in software. BOD EEPROM/FLASH is
always on, except in power-down modes and could not be disabled in software.
BOD reset and BOD interrupt, each has four trip voltage levels. BOE1 bit (UCFG1.5) and
BOE0 bit (UCFG1.3) are used as trip point configuration bits of BOD reset. BOICFG1 bit
and BOICFG0 bit in register BODCFG are used as trip point configuration bits of BOD
interrupt. BOD reset voltage should be lower than BOD interrupt trip point. BOD
EEPROM/FLASH is used for flash/Data EEPROM programming/erase protection and has
only 1 trip voltage of 2.4 V. Please refer to P89LPC9321 User manual for detail
configurations.
If brownout detection is enabled the brownout condition occurs when V
brownout trip voltage and is negated when V
For correct activation of brownout detect, the V
Please see
The Power-on detect has a function similar to the brownout detect, but is designed to work
as power comes up initially, before the power supply voltage reaches a level where
brownout detect can work. The POF flag in the RSTSRC register is set to indicate an
initial power-up condition. The POF flag will remain set until cleared by software.
The P89LPC9321 supports three different power reduction modes. These modes are Idle
mode, Power-down mode, and total Power-down mode.
Idle mode leaves peripherals running in order to allow them to activate the processor
when an interrupt is generated. Any enabled interrupt source or reset may terminate Idle
mode.
The Power-down mode stops the oscillator in order to minimize power consumption. The
P89LPC9321 exits Power-down mode via any reset, or certain interrupts. In Power-down
mode, the power supply voltage may be reduced to the data retention supply voltage
V
SFR contents are not guaranteed after V
highly recommended to wake-up the processor via reset in this case. V
to within the operating range before the Power-down mode is exited.
DDR
. This retains the RAM contents at the point where Power-down mode was entered.
Table 10 “Static characteristics”
Rev. 01 — 9 December 2008
8-bit microcontroller with accelerated two-clock 80C51 core
DD
for specifications.
has been lowered to V
DD
DD
rises above the brownout trip voltage.
rise and fall times must be observed.
P89LPC9321
DDR
, therefore it is
DD
© NXP B.V. 2008. All rights reserved.
DD
falls below the
must be raised
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