DS2155L+ Maxim Integrated Products, DS2155L+ Datasheet - Page 78

IC TXRX T1/E1/J1 1-CHIP 100-LQFP

DS2155L+

Manufacturer Part Number
DS2155L+
Description
IC TXRX T1/E1/J1 1-CHIP 100-LQFP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS2155L+

Function
Single-Chip Transceiver
Interface
E1, HDLC, J1, T1
Number Of Circuits
1
Voltage - Supply
3.14 V ~ 3.47 V
Current - Supply
75mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-LQFP
Includes
BERT Generator and Detector, CMI Coder and Decoder, HDLC Controller
Product
Framer
Number Of Transceivers
1
Data Rate
64 Kbps
Supply Voltage (max)
3.465 V
Supply Voltage (min)
3.135 V
Supply Current (max)
75 mA (Typ)
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
14.2 Path Code Violation Count Register (PCVCR)
14.2.1 T1 Operation
The path code violation count register records Ft, Fs, or CRC6 errors in T1 frames. When the receive side
of a framer is set to operate in the T1 ESF framing mode, PCVCR records errors in the CRC6 codewords.
When set to operate in the T1 D4 framing mode, PCVCR counts errors in the Ft framing bit position.
Through the ERCNT.2 bit, a framer can be programmed to also report errors in the Fs framing bit
position. The PCVCR is disabled during receive loss-of-synchronization (RLOS = 1) conditions.
Table 14-C
Table 14-C. T1 Path Code Violation Counting Arrangements
14.2.2 E1 Operation
The path code violation-count register records CRC4 errors. Since the maximum CRC4 count in a one-
second period is 1000, this counter cannot saturate. The counter is disabled during loss-of-sync at either
the FAS or CRC4 level; it continues to count if loss-of-multiframe sync occurs at the CAS level.
Path code violation-count register 1 (PCVCR1) is the most significant word and PCVCR2 is the least
significant word of a 16-bit counter that records path violations (PVs).
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 0 to 7/Path Code Violation Counter Bits 8 to 15 (PCVC8 to PCVC15). PCVC15 is the MSB of the 16-bit
path code violation count.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 0 to 7/Path Code Violation Counter Bits 0 to 7 (PCVC0 to PCVC7). PCVC0 is the LSB of the 16-bit path
code violation count.
FRAMING MODE
ESF
D4
D4
PCVC7
PCVC15
shows what errors the PCVCR counts.
7
0
7
0
PCVC6
PCVC14
PCVCR1
Path Code Violation Count Register 1
44h
PCVCR2
Path Code Violation Count Register 2
45h
COUNT Fs ERRORS?
6
0
6
0
Don’t Care
PCVC5
Yes
No
PCVC13
5
0
5
0
PCVC4
4
0
PCVC12
Errors in the Ft pattern
Errors in the CRC6 codewords
Errors in both the Ft and Fs patterns
4
0
78 of 238
PCVC3
3
0
PCVC11
IN THE PCVCRs
COUNTED
3
0
PCVC2
2
0
PCVC10
2
0
PCVC1
1
0
PCVC9
1
0
PCVC0
0
0
PCVC8
0
0
DS2155

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