DS21554L+ Maxim Integrated Products, DS21554L+ Datasheet - Page 104
![IC TXRX E1 1-CHIP 5V 100-LQFP](/photos/6/82/68291/406-100-lqfp_sml.jpg)
DS21554L+
Manufacturer Part Number
DS21554L+
Description
IC TXRX E1 1-CHIP 5V 100-LQFP
Manufacturer
Maxim Integrated Products
Datasheet
1.DS2154LNA2.pdf
(124 pages)
Specifications of DS21554L+
Function
Single-Chip Transceiver
Interface
E1, HDLC, J1, T1
Number Of Circuits
1
Voltage - Supply
4.75 V ~ 5.25 V
Current - Supply
75mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-LQFP
Includes
Remote and AIS Alarm Detector / Generator
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
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18.2.
Figure 18-7. Transmit-Side Timing
Figure 18-8. Transmit-Side Boundary Timing (with Elastic Store Disabled)
Transmit
FRAME#
TSYNC
TLCLK
TSYNC
TSSYNC
TLINK
TCHBLK
TCHCLK
TSYNC
TSYNC
TLCLK
TLINK
TSER
TCLK
NOTE 1: TSYNC IN FRAME MODE (TCR1.1 = 0).
NOTE 2: TSYNC IN MULTIFRAME MODE (TCR1.1 = 1).
NOTE 3: TLINK IS PROGRAMMED TO SOURCE JUST THE SA4 BIT.
NOTE 4: THIS DIAGRAM ASSUMES BOTH THE CAS MF AND THE CRC4 MF BEGIN WITH THE TAF FRAME.
NOTE 5: TLINK AND TLCLK ARE NOT SYNCHRONOUS WITH TSSYNC.
TSIG
3
NOTE 1: TSYNC IS IN THE OUTPUT MODE (TCR1.0 = 1).
NOTE 2: TSYNC IS IN THE INPUT MODE (TCR1.0 = 0).
NOTE 3: TCHBLK IS PROGRAMMED TO BLOCK CHANNEL 2.
NOTE 4: TLINK IS PROGRAMMED TO SOURCE THE SA4 BIT.
NOTE 5: THE SIGNALING DATA AT TSIG DURING CHANNEL 1 IS NORMALLY OVERWRITTEN IN THE TRANSMIT
FORMATTER WITH THE CAS MF ALIGNMENT NIBBLE (0000).
NOTE 6: SHOWN IS A TNAF FRAME BOUNDARY.
2
3
1
14 15 16
1
2
3
4
4
LSB
D
DON'T CARE
Si
1 2 3 4 5
1
A Sa4 Sa5 Sa6 Sa7 Sa8
CHANNEL 1
CHANNEL 1
6 7 8 9 10
104 of 124
MSB
11 12
DON'T CARE
13 14 15 16 1 2 3 4 5
CHANNEL 2
CHANNEL 2
A
B
C
LSB MSB
D
6 7 8 9 10
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