SI3220-BQ Silicon Laboratories Inc, SI3220-BQ Datasheet - Page 82

IC SLIC/CODEC DUAL-CH 64TQFP

SI3220-BQ

Manufacturer Part Number
SI3220-BQ
Description
IC SLIC/CODEC DUAL-CH 64TQFP
Manufacturer
Silicon Laboratories Inc
Series
ProSLIC®r
Datasheets

Specifications of SI3220-BQ

Package / Case
*
Function
Subscriber Line Interface Concept (SLIC), CODEC
Interface
GCI, PCM, SPI
Number Of Circuits
2
Voltage - Supply
3.3V, 5V
Current - Supply
65mA
Power (watts)
941mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Includes
Battery Switching, BORSCHT Functions, DTMF Generation and Decoding, FSK Tone Generation, Modem and Fax Tone Detection
Product
Telecom
Supply Voltage (min)
3.13 V
Supply Current
22 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Number Of Channels
2
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SI3220-BQ
Manufacturer:
TONTEK
Quantity:
12 000
Part Number:
SI3220-BQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Si3220/Si3225
SC Channel
The downstream and upstream SC channels are
continuously carrying I/O information to and from the
Dual ProSLIC during every frame. The upstream
processor has immediate access to the receive
(downstream) and transmit (upstream) data present on
the Dual ProSLIC’s digital I/O port when used in GCI
mode. The SC channel consists of six C/I bits and two
handshaking bits as described in the tables below. The
functionality of the handshaking bits is defined in the
Monitor Channel section. This section defines the
functionality of the six C/I bits whether they are being
transmitted to the GCI bus via the DTX pin (upstream)
or received from the GCI bus via the DRX pin
(downstream). The structure of the SC channel is
shown in Figure 62.
Downstream (Receive) SC Channel Byte
The first six bits in the downstream SC channel control
both channels of the Dual ProSLIC where the C/I bits
are defined as follows:
82
Table 44. Programming Operating Modes Using
CI2A, CI1A, CI0A
CI2B, CI1B, CI0B
MR, MX
MSB
CI2A
Channel Specific C/I bits
CI2x
7
0
0
0
0
CI1A
Downstream SC Channel C/I Bits
Figure 62. SC Channel Structure
6
CI1x
0
0
1
1
CI0A
5
CI0x
Used to select operating mode for
Used to select operating mode for
Monitor channel handshake bits
0
1
0
1
CI2B
4
Dual ProSLIC Operating
Mode
Open (high impedence,
no line monitoring)
Forward Active
Forward On-Hook Trans-
mission
Ground Start (Tip Open)
CI1B
3
channel A
channel B
CI0B
2
MR
1
Preliminary Rev. 0.91
MX
LSB
0
Figure 63 illustrates the transmission protocol for the C/I
bits within the downstream SC channel. New data
received by either channel must be present and match
for two consecutive frames to be considered valid.
When a new command is communicated via the
downstream C/I bits, this data must be sent for at least
two consecutive frames to be recognized by the Dual
ProSLIC.
The current state of the C/I bits is stored in a primary
register P. If the received C/I bits are identical to the
current state, no action is taken. If the received C/I bits
differ from those in register P, the new set of C/I bits is
loaded into secondary register S and a latch is set.
When the next set of C/I bits is received during the
frame that immediately follows, the following rules
apply:
!
!
!
Table 44. Programming Operating Modes Using
Downstream SC Channel C/I Bits (Continued)
Note: x = A or B, corresponding to channel A or channel B.
If the received C/I bits are identical to the contents of
register S, the stored C/I bits are loaded into register
P and a valid C/I bit transition is recognized. The
latch is reset and the Dual ProSLIC responds
accordingly to the command represented by the new
C/I bits.
If the received C/I bits differ from both the contents of
register S and the contents of register P, the newly
received C/I bits are loaded into register S and the
latch remains set. This cycle continues as long as
any new set of C/I bits differs from the contents of
registers S and P.
If the newly received C/I bits are identical to the
contents of register P, the contents of register P
remain unchanged and the latch is reset.
1
1
1
1
0
0
1
1
0
1
0
1
Ringing
Reverse Active
Reverse On-Hook Trans-
mission
Ground Start (Ring Open)

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