DS2180A Maxim Integrated Products, DS2180A Datasheet - Page 9

• Manufacturer Part Number: DS2180A
• Description: IC TRANSCEIVER T1 40-DIP
• Manufacturer: Maxim Integrated Products

Specifications of DS2180A

• Function: Transceiver
• Interface: T1
• Number Of Circuits: 1
• Voltage - Supply: 4.5 V ~ 5.5 V
• Current - Supply: 3mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Through Hole
• Package / Case: 40-DIP (0.600", 15.24mm)
• Includes: Alarm Generation and Detection, B7 Stuffing Mode, B8ZS Mode, Error Detection and Counter, "Hardware" Mode, Transparent Mode
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Power (watts): -

TRANSMIT SIGNALING
When enabled (via TCR.4) channel signaling is inserted in frames 6 and 12 (193S) or in frames 6, 12, 18
and 24 (193E) in the 8
falling edge of TCLK during bit 8 of each input word during signaling frames. Logical combination of
clocks TMO, TSIGFR and TSIGSEL allows external multiplexing of separate serial links for A, B or A,
B, C, D signaling sources.
TTR1–TTR3: TRANSMIT TRANSPARENCY REGISTERS Figure 6
(MSB)
TIR1–TIR3: TRANSMIT IDLE REGISTERS Figure 7
(MSB)
TRANSMIT CHANNEL TRANSPARENCY
Individual DS0 channels in the T1 frame may be programmed clear (no inserted robbed bit signaling and
no bit 7 zero suppression) by setting the appropriate bits in the transmit transparency registers. Channel
transparency is required in mixed voice/data or data-only environments such as ISDN, where data
integrity must be maintained.
TRANSMIT IDLE CODE INSERTION
Individual outgoing channels in the frame can be programmed with idle code by asserting the appropriate
bits in the transmit idle registers. One of two idle code formats, 7F (Hex) and FF (Hex) may be selected
by the user via TCR.3. If enabled, robbed bit signaling data is inserted into the idle channel, unless the
appropriate TTR bit is set for that channel. This feature eliminates external hardware currently required to
intercept and stuff unoccupied channels in the DS1 bit stream.
SYMBOL
SYMBOL
CH16
CH24
CH16
CH24
CH8
CH8
CH24
CH24
CH1
CH1
CH15
CH23
CH15
CH23
CH7
CH7
POSITION
POSITION
th
TTR3.7
TTR1.0
TIR1.0
TIR3.7
bit position of every channel word. Signaling data is sampled at TABCD on the
CH14
CH22
CH14
CH22
CH6
CH6
CH13
CH21
CH13
CH21
CH5
CH5
NAME AND DESCRIPTION
Transmit Transparent Registers. Each of these bit positions
represents a DS0 channel in the outgoing frame. When set, the
corresponding channel is transparent.
NAME AND DESCRIPTION
Transmit Idle Registers. Each of these bit positions represents a
DS0 channel in the outgoing frame. When set, the corresponding
channel will output an idle code format determined by TCR.2.
CH12
CH20
CH12
CH20
9 of 35
CH4
CH4
CH11
CH19
CH11
CH19
CH3
CH3
CH10
CH18
CH10
CH18
CH2
CH2
CH17
CH17
CH1
CH9
CH1
CH9
(LSB)
(LSB)
TIR1
TIR2
TIR3
TIR1
TIR2
TIR3
DS2180A