DS21554L Maxim Integrated Products, DS21554L Datasheet - Page 51

IC TXRX E1 1-CHIP 5V 100-LQFP

DS21554L

Manufacturer Part Number
DS21554L
Description
IC TXRX E1 1-CHIP 5V 100-LQFP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS21554L

Function
Single-Chip Transceiver
Interface
E1, HDLC, J1, T1
Number Of Circuits
1
Voltage - Supply
4.75 V ~ 5.25 V
Current - Supply
75mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-LQFP
Includes
Remote and AIS Alarm Detector / Generator
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Power (watts)
-

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7.2.
CRC4 Count Register 1 (CRCCR1) is the most significant word and CRCCR2 is the least significant
word of a 10-bit counter that records word errors in the Cyclic Redundancy Check 4 (CRC4). Since the
maximum CRC4 count in a one second period is 1000, this counter cannot saturate. The counter is
disabled during loss of sync at either the FAS or CRC4 level; it will continue to count if loss of
multiframe sync occurs at the CAS level.
CRCCR1: CRC4 COUNT REGISTER 1 (Address = 02 Hex)
CRCCR2: CRC4 COUNT REGISTER 2 (Address = 03 Hex)
Note: The upper six bits of CRCCR1 at address 02 are the most significant bits of the 12-bit FAS error counter.
7.3.
E–bit Count Register 1 (EBCR1) is the most significant word and EBCR2 is the least significant word of
a 10–bit counter that records Far-End Block Errors (FEBE) as reported in the first bit of frames 13 and 15
on E1 lines running with CRC4 multiframe. These count registers will increment once each time the
received E-bit is set to zero. Since the maximum E-bit count in a one second period is 1000, this counter
cannot saturate. The counter is disabled during loss of sync at either the FAS or CRC4 level; it will
continue to count if loss of multiframe sync occurs at the CAS level.
EBCR1: E-BIT COUNT REGISTER 1 (Address = 04 Hex)
EBCR2: E-BIT COUNT REGISTER 2 (Address = 05 Hex)
Note: The upper six bits of EBCR1 at address 04 are the least significant bits of the 12-bit FAS error counter.
(See Note)
(See Note)
SYMBOL
SYMBOL
(MSB)
(MSB)
CRC7
EB7
CRC9
CRC0
EB9
EB0
CRC4 Error Counter
E-Bit Counter
(See Note)
(See Note)
CRC6
EB6
POSITION
POSITION
CRCCR1.1
CRCCR2.0
EBCR1.1
EBCR2.0
(See Note)
(See Note)
CRC5
EB5
MSB of the 10-Bit CRC4 error count
LSB of the 10-Bit CRC4 error count
MSB of the 10-Bit E-Bit Error Count
LSB of the 10-Bit E-Bit Error Count
(See Note)
(See Note)
CRC4
EB4
(See Note)
(See Note)
51 of 124
CRC3
EB3
NAME AND DESCRIPTION
NAME AND DESCRIPTION
(See Note)
(See Note)
CRC2
EB2
CRC9
CRC1
EB9
EB1
(LSB)
CRC8
CRC0
(LSB)
EB8
EB0
CRCCR1
CRCCR2
EBCR1
EBCR2

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