DS3174 Maxim Integrated Products, DS3174 Datasheet - Page 35
DS3174
Manufacturer Part Number
DS3174
Description
IC QUAD DS3/E3 TXRX 400-PBGA
Manufacturer
Maxim Integrated Products
Datasheet
1.DS3171N.pdf
(234 pages)
Specifications of DS3174
Function
Single-Chip Transceiver
Interface
DS3, E3
Number Of Circuits
4
Voltage - Supply
3.135 V ~ 3.465 V
Current - Supply
725mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
400-BGA
Includes
DS3 Framers, E3 Framers, HDLC Controller, On-Chip BERTs
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
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PIN NAME
AVDDRn
AVDDTn
AVDDJn
AVDDC
CLKA
CLKB
CLKC
VDD
VSS
TYPE
PWR
PWR
PWR
PWR
PWR
PWR
IO
IO
I
Clock A
CLKA: This clock input is a DS3 signal(44.736MHz +/-20ppm) when the CLAD is disabled or it
is one of the CLAD reference clock signals when the CLAD is enabled.
Clock B
CLKB: This pin is a E3(34.368 MHz +/-20 ppm) input signal when the CLAD is disabled or it
can be enabled to output a generated clock when the CLAD is enabled. The pin is driven low
when it is not selected to output a clock signal and the CLAD is enabled. Refer to
Clock C
CLKC: This pin is a STS-1 (51.84 MHz +/-20ppm) input signal when the CLAD is disabled or it
can be enabled to output a generated clock when the CLAD is enabled. The pin is driven low
when it is not selected to output a clock signal and the CLAD is enabled. Refer to
Ground, 0 Volt potential
Common to digital core, digital IO and all analog circuits
Digital 3.3V
Common to digital core and digital IO
Analog 3.3V for receive LIU on port n
Powers receive LIU on port n
Analog 3.3V for transmit LIU on port n
Powers transmit LIU on port n
Analog 3.3V for jitter attenuator on port n
Powers jitter attenuator on port n
Analog 3.3V for CLAD
Powers clock rate adapter common to all ports
POWER
CLAD
35
PIN DESCRIPTION
Table
Table
10-11.
10-11.
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