PEB 3081 F V1.4 Infineon Technologies, PEB 3081 F V1.4 Datasheet - Page 152
PEB 3081 F V1.4
Manufacturer Part Number
PEB 3081 F V1.4
Description
IC S-BUS INTERFACE EXT TQFP48
Manufacturer
Infineon Technologies
Datasheet
1.PEB_3081_F_V1.4.pdf
(190 pages)
Specifications of PEB 3081 F V1.4
Function
S / T Bus Interface Transceiver
Interface
IOM-2, ISDN, SCI
Number Of Circuits
1
Voltage - Supply
3.3V
Current - Supply
30mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
48-LFQFP
Includes
D-Channel Access Control, Monitor Channel Handler
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
Other names
PEB3081FV1.4XT
PEB3081FV14XP
SP000007636
SP000007637
PEB3081FV14XP
SP000007636
SP000007637
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SBCX-X
PEB 3081
Detailed Register Description
4.3.11
STI - Synchronous Transfer Interrupt
Value after reset: 00
H
7
0
STI
STOV
STOV
STOV
STOV
STI
STI
STI
STI
RD (58)
21
20
11
10
21
20
11
10
For all interrupts in the STI register the following logical states are applied:
0: Interrupt is not activated
1: Interrupt is activated
The interrupts are automatically reset by reading the STI register. For general
information please refer to
Chapter
3.7.1.1.
STOVxy ... Synchronous Transfer Overflow Interrupt
Enabled STOV interrupts for a certain STIxy interrupt are generated when the STIxy has
not been acknowledged in time via the ACKxy bit in the ASTI register. This must be one
(for DPS=’0’) or zero (for DPS=’1’) BCL clocks before the time slot which is selected for
the STOV.
STIxy ... Synchronous Transfer Interrupt
Depending on the DPS bit in the corresponding TSDPxy register the Synchronous
Transfer Interrupt STIxy is generated two (for DPS=’0’) or one (for DPS=’1’) BCL clock
after the selected time slot (TSDPxy.TSS).
Note: STOVxy and ACKxy are useful for synchronizing microcontroller accesses and
receive/transmit operations. One BCL clock is equivalent to two DCL clock cycles.
Data Sheet
152
2003-02-04
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