PSB 21393 H V1.3 Infineon Technologies, PSB 21393 H V1.3 Datasheet - Page 108

• Manufacturer Part Number: PSB 21393 H V1.3
• Description: IC CODEC W/TRANSCEIVER MQFP-44
• Manufacturer: Infineon Technologies
• Series: SCOUT™r

Specifications of PSB 21393 H V1.3

• Function: CODEC
• Interface: IOM-2, SCI, UPN
• Number Of Circuits: 1
• Voltage - Supply: 3.3V, 5V
• Current - Supply: 27mA
• Mounting Type: Surface Mount
• Package / Case: 44-BQFP
• Includes: Activation and Deactivation, Channel Handler, DTMF / Tone / Ringing Generator, HDLC Controller, Speakerphone, UPN Transceiver
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Operating Temperature: -
• Other names: PSB21393HV1.3XT; PSB21393HV13XP; SP000007533; SP000007534

Data Sheet
3.3.1.2
If the transmitter sees an empty FIFO, i.e. if the microcontroller does not react quickly
enough to an XPR interrupt, an XDU (transmit data underrun) interrupt will be raised. If
the HDLC channel becomes unavailable during transmission the transmitter tries to
repeat the current frame as specified in the LAPD protocol. This is impossible after the
first data block has been sent (16 or 32 bytes), in this case an XMR transmit message
repeat interrupt is set and the microcontroller has to send the whole frame again.
Both XMR and XDU interrupts cause a reset of the XFIFO. The XFIFO is locked while
an XMR or XDU interrupt is pending, i.e. all write actions of the microcontroller will be
ignored as long as the microcontroller has not read the ISTAH register with the set XDU,
XMR interrupts.
If the microcontroller writes more data than allowed (16 or 32 bytes), then the data in the
XFIFO will be corrupted and the STAR.XDOV bit is set. If this happens, the
microcontroller has to abort the transmission by CMDR.XRES and to restart.
Possible Error Conditions during Transmission of Frames
98
HDLC Controller
PSB 21391
PSB 21393
2001-03-07