LTC3589EUJ-1#PBF Linear Technology, LTC3589EUJ-1#PBF Datasheet - Page 42
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LTC3589EUJ-1#PBF
Manufacturer Part Number
LTC3589EUJ-1#PBF
Description
Manufacturer
Linear Technology
Datasheet
1.LTC3589EUJ-1PBF.pdf
(46 pages)
Specifications of LTC3589EUJ-1#PBF
Lead Free Status / Rohs Status
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APPLICATIONS INFORMATION
LTC3589/LTC3589-1
PXA16X Armada Processor Support
LTC3589/LTC3589-1 includes spare register bits that can
be accessed by the processor for setting and recalling
hibernate and resume operation.
The keep-alive function allow a step-down switching
regulator to maintain system memory during a hibernate
shutdown state of the Armada processor.
i.MX Processor Support
The LTC3589/LTC3589-1 has hardware features specifically
designed for the latest i.MX family of processors from
Freescale Semiconductor. The i.MX51 controls the VSTB
input pin of the LTC3589/LTC3589-1 to command transi-
tions between the run mode core voltage and the lower
level standby voltage. The run and standby voltage levels
are initially programmed in I
and xxBTV2. When the VSTB pin is asserted high all four
dynamically controlled output supply rails will slew to the
xxBTV2 set point. When xxBTV1 and xxBTV2 are set at
the same value, as they are by default, then no slewing
occurs. This allows the single VSTB pin to control any
combination of the four DAC controlled regulators to slew
between two programmed output voltages. When VSTB is
de-asserted back to a zero value the regulators slew back
up to the xxBTV1 set point.
42
2
C command registers xxBTV1
Earlier i.MX family processors such as the i.MX31 included
two VSTB pins used for controlling the regulator outputs
for a low voltage standby mode, nominal voltage run
mode, and a higher voltage overdrive mode. The LTC3589/
LTC3589-1 can be used with these processors using the
VSTB input pin to select between run and standby voltages
and using minimal software overhead to set the overdrive
voltage in I
The default DAC reference value in all xxBTVx registers
is 0x19. This accommodates i.MX processors and others
requiring an overdrive voltage. The value can be increased
up to 0x1F for overdrive or supply margining above the
nominal run voltage. Once programmed into the I
mand registers xxBTVx two voltage outputs are selected
by the VSTB pin. All voltage levels and changes are fully
controllable using the I
OMAP3 and DaVinci Processor Support
The OMAP3 family of ARM processors has similar require-
ments to the processors described above. The LTC3589/
LTC3589-1 I
reflex dynamic voltage control with proper embedded
software drivers tailored to the LTC3589/LTC3589-1
register mapping. The LTC3589/LTC3589-1 demo board
demonstrates configuring and dynamically slewing and
sequencing the outputs using I
sions can be incorporated into embedded software drivers
for the OMAP3 or any other target processor.
2
C command registers.
2
C control can fully accommodate the smart
2
C serial port.
2
C control. The same provi-
2
C com-
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