CY8C5468LTI-037 Cypress Semiconductor Corp, CY8C5468LTI-037 Datasheet - Page 6

• Manufacturer Part Number: CY8C5468LTI-037
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY8C5468LTI-037

• Lead Free Status / Rohs Status: Compliant

Document Number: 001-66238 Rev. *A
Notes
3. The center pad on the QFN package should be connected to digital ground (V
4. Pins are Do Not Use (DNU) on devices without USB. The pin must be left floating.
ground, it should be electrically floated and not connected to any other signal.
(SWDCK, GPIO) P1[1]
(SWDIO, GPIO) P1[0]
(SWV, GPIO) P1[3]
(GPIO) P2[6]
(GPIO) P2[7]
(GPIO) P1[2]
(GPIO) P1[4]
(GPIO) P1[5]
(SIO) P12[4]
(SIO) P12[5]
Vboost
Vddio1
XRES
Vssb
Vssd
Vbat
Ind
10
11
12
13
14
15
16
17
1
2
3
4
5
6
7
8
9
Lines show Vddio
to I/O supply
association
PRELIMINARY
Figure 2-1. 68-pin QFN Part Pinout
(Top View)
QFN
SSD
) for best mechanical, thermal, and electrical performance. If not connected to
PSoC
®
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
[3]
5: CY8C54 Family Datasheet
P0[3] (GPIO, OpAmp0-/Extref0)
P0[2] (GPIO, OpAmp0+)
P0[1] (GPIO, OpAmp0out)
P0[0] (GPIO, OpAmp2out)
P12[3] (SIO)
P12[2] (SIO)
Vssd
Vdda
Vssa
Vcca
P15[3] (GPIO, kHz XTAL: Xi)
P15[2] (GPIO, kHz XTAL: Xo)
P12[1] (SIO)
P12[0] (SIO)
P3[7] (GPIO, OpAmp3out)
P3[6] (GPIO, OpAmp1out)
Vddio3
Page 6 of 105
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