PCA9541APW/01 NXP Semiconductors, PCA9541APW/01 Datasheet - Page 27

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PCA9541APW/01

Manufacturer Part Number
PCA9541APW/01
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PCA9541APW/01

Lead Free Status / Rohs Status
Compliant

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NXP Semiconductors
PCA9541A_3
Product data sheet
10.5 Bus initialization/recovery to initialize slaves without hardware reset
If the I
and Slave 2 in
PCA9541A/03 disconnects the bus when it is reset via the hardware reset line, restoring
the master's control of the rest of the bus (for example, Slave 0). The bus master can then
command the PCA9541A/03 to send 9 clock pulses/STOP condition to reset the
downstream I
downstream devices isolated.
Fig 21. Gatekeeper multiplexer application
Fig 22. Bus initialization/recovery application
2
C-bus is hung, I
MASTER
2
A
Z
C-bus devices before they are reconnected to the master or leave the
Figure
22) can be isolated from the master by the PCA9541A/03. The
SLAVE 0
2
Rev. 03 — 16 July 2009
C-bus devices without a hardware reset pin (for example, Slave 1
SDA/SCL
B
Z
2-to-1 I
2
C-bus master selector with interrupt logic and reset
C
Z
PCA9541A/03
RESET
D
Z
SDA
SCL
E
Z
SLAVE 1
SLAVE 2
F
Z
PCA9541A
© NXP B.V. 2009. All rights reserved.
slave I
002aae666
G
Z
2
C-bus
002aae665
27 of 41
H
Z

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