SC28C94A1A,512 NXP Semiconductors, SC28C94A1A,512 Datasheet - Page 14

IC UART QUAD W/FIFO 52-PLCC

SC28C94A1A,512

Manufacturer Part Number
SC28C94A1A,512
Description
IC UART QUAD W/FIFO 52-PLCC
Manufacturer
NXP Semiconductors
Type
Quad UARTr
Datasheet

Specifications of SC28C94A1A,512

Number Of Channels
4, QUART
Package / Case
52-PLCC
Features
False-start Bit Detection
Fifo's
8 Byte
Voltage - Supply
5V
With Auto Flow Control
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
With Cmos
Yes
Mounting Type
Surface Mount
Data Rate
1 Mbps
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Supply Current
35 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-3993-5
935262534512
SC28C94A1A
SC28C94A1A

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SC28C94A1A,512
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Philips Semiconductors
Table 4.
SR (Status Register)
NOTE: These status bits are appended to the corresponding data character in the receive FIFO. A read of the status register provides these
bits [7:5] from the top of the FIFO together with bits [4:0]. These bits are cleared by a reset error status command. Unless reset with the ‘Error
Reset’ (CR command 40) or receiver reset, these bits will remain active in the Status Register after the RxFIFO is empty. In block error mode,
block error conditions must be cleared by using the error reset command (command 4x) or a receiver reset.
ACR (Auxiliary Control Register)
ISR (Interrupt Status Register)
IMR (Interrupt Mask Register)
CTUR (Counter/Timer Upper Register)
CTUR (Counter/Timer Lower Register)
IPR (Input Port Register)
2006 Aug 09
Bit 7
Rec’d. Break
Quad universal asynchronous receiver/transmitter (QUART)
BRG Set
0 = set 1
1 = set 2
Change
Change
1 = High
I/O Port
I/O Port
0 = Low
1 = Yes
1 = Yes
C/T[15]
0 = No
Select
0 = No
C/T[7]
0 = off
1 = on
I/O3b
INT
*
Bit 6
Framing Error
Register Bit Formats, Duart ab. [duplicated for Duart cd] (continued)
BREAKb
BREAKb
1 = High
0 = Low
1 = Yes
1 = Yes
C/T[14]
0 = No
0 = No
0 = off
1 = on
C/T[6]
Delta
Delta
I/O2b
INT
*
Mode and Source
Bit 5
Counter/Timer
Parity Error
See text
RxRDY/
FFULLb
RxRDY/
FFULLb
1 = High
0 = Low
1 = Yes
1 = Yes
C/T[13]
0 = No
0 = No
0 = off
1 = on
C/T[5]
I/O3a
INT
*
Bit 4
Overrun Error
TxRDYb
TxRDYb
1 = High
1 = Yes
0 = Low
1 = Yes
C/T[12]
0 = No
0 = No
0 = off
1 = on
C/T[4]
I/O2a
INT
14
Bit 3
Counter
Counter
1 = High
0 = Low
1 = Yes
C/T[11]
TxEMT
1 = Yes
0 = off
1 = on
Ready
Ready
0 = No
0 = No
Delta
0 = off
1 = on
C/T[3]
I/O1b
I/O1b
INT
Bit 2
BREAKa
BREAKa
1 = High
0 = Low
TxRDY
1 = Yes
1 = Yes
C/T[10]
0 = No
0 = off
1 = on
0 = No
1 = on
C/T[2]
Delta
0 = off
I/O0b
I/O0b
Delta
Delta
INT
Bit 1
RxFULL
RxRDY/
FFULLa
RxRDY/
FFULLa
1 = High
0 = Low
1 = Yes
1 = Yes
0 = No
0 = off
1 = on
0 = No
0 = off
1 = on
C/T[9]
C/T[1]
Delta
I/O1a
I/O1a
INT
SC28C94
Product data sheet
Bit 0
TxRDYa
TxRDYa
1 = High
RxRDY
0 = Low
1 = Yes
1 = Yes
0 = No
0 = No
0 = off
1 = on
C/T[8]
C/T[0]
0 = off
1 = on
Delta
I/O0a
I/O0a
INT

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