SCC2698BE1A84,518 NXP Semiconductors, SCC2698BE1A84,518 Datasheet - Page 20
![IC UART OCTAL ENHANCED 84-PLCC](/photos/6/98/69866/568-84-plcc_sot189-2_sml.jpg)
SCC2698BE1A84,518
Manufacturer Part Number
SCC2698BE1A84,518
Description
IC UART OCTAL ENHANCED 84-PLCC
Manufacturer
NXP Semiconductors
Datasheet
1.SCC2698BC1A84512.pdf
(29 pages)
Specifications of SCC2698BE1A84,518
Features
False-start Bit Detection
Number Of Channels
8
Fifo's
3Bit
Voltage - Supply
5V
With Auto Flow Control
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
With Cmos
Yes
Mounting Type
Surface Mount
Package / Case
84-LCC (J-Lead)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935056380518
SCC2698BE1A84-T
SCC2698BE1A84-T
SCC2698BE1A84-T
SCC2698BE1A84-T
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SCC2698BE1A84,518
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Philips Semiconductors
AC Electrical characteristics
2006 Aug 07
Reset timing
t
Bus timing
t
t
t
t
t
t
t
t
t
t
MPI and MPO timing
t
t
t
Interrupt timing
t
Clock timing
t
t
t
f
t
f
t
f
Transmitter timing
t
t
Receiver timing
t
t
RES
HS
AH
CS
CH
RW
DD
DF
DS
DH
RWD
PS
PH
PD
IR
CLK
CLK
CTC
CTC
RX
RX
TX
TX
TXD
TCS
RXS
RXH
SYMBOL
SYMBOL
Enhanced octal universal asynchronous
receiver/transmitter (Octal UART)
11
6
6
7
5
FIGURE
FIGURE
10
10
11
11
5
6
6
6
6
6
6
6
6
6
7
7
7
8
9
9
9
9
9
9
9
9
5
Reset pulse width
A0–A5 setup time to RDN, WRN Low
A0–A5 hold time from RDN, WRN Low
CEN setup time to RDN, WRN Low
CEN hold time from RDN, WRN High
WRN, RDN pulse width Low
Data valid after RDN Low
Data bus floating after RDN High
Data setup time before WRN High
Data hold time after WRN High
Time between reads and/or writes
MPI or MPP input setup time before RDN Low
MPI or MPP input hold time after RDN High
MPO output valid from
INTRN negated or MPP output High from:
X1/CLK high or low time
X1/CLK frequency
Counter/timer clock high or low time
Counter/timer clock frequency
RxC high or low time
RxC frequency (16X)
RxC frequency (1X)
TxC high or low time
TxC frequency (16X)
TxC frequency (1X)
TxD output delay from TxC low
TxC output delay from TxD output data
RxD data setup time to RxC high
RxD data hold time from RxC high
Read RHR (RxRDY/FFULL interrupt)
Write THR (TxRDY interrupt)
Reset command (break change interrupt)
Reset command (MPI change interrupt)
Stop C/T command (counter interrupt)
Write IMR (clear of interrupt mask bit)
WRN High
RDN Low
1, 2, 3, 4 T
10
A
= 0 to +70 , V
PARAMETER
PARAMETER
CC
= 5.0 V
20
10%, –40 to 85 C
Min
200
100
225
100
100
120
120
200
200
100
10
10
50
0
0
0
0
0
0
0
0
0
0
0
8
8
8
8
8
LIMITS
3.6864
Typ
SCC2698B
Max
200
250
250
270
270
270
270
270
270
350
150
4.0
4.0
2.0
1.0
2.0
1.0
80
Product data sheet
UNIT
UNIT
MHz
MHz
MHz
MHz
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns