NS16C2752TVA/NOPB National Semiconductor, NS16C2752TVA/NOPB Datasheet - Page 18

• Manufacturer Part Number: NS16C2752TVA/NOPB
• Description: IC UART DUAL 64BYTE 44-PLCC
• Manufacturer: National Semiconductor

Specifications of NS16C2752TVA/NOPB

• Features: Programmable
• Number Of Channels: 2, DUART
• Fifo's: 64 Byte
• Voltage - Supply: 2.97 V ~ 5.5 V
• With Auto Flow Control: Yes
• With Irda Encoder/decoder: Yes
• With Modem Control: Yes
• Mounting Type: Surface Mount
• Package / Case: 44-LCC (J-Lead)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: NS16C2752TVA

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6.7 MODEM CONTROL REGISTER (MCR)
This register controls the interface with the MODEM or data
set (or a peripheral device emulating a MODEM). There is a
clock divider for each channel. Each is capable of taking a
Bit
7
6
5
IR Mode Sel
Clk Divider
Bit Name
Xon-Any
Ena
Sel
R/W
R/W
R/W
R/W
Def
0
0
0
Clock Divider Select
This bit selects the clock divider from crystal or oscillator input. The divider output connects to the
Baud Rate Generator.
1 = Divide XIN frequency by 4.
0 = Divide XIN frequency by 1 (default).
Infrared Encoder/Decoder Select
This bit selects standard modem or IrDA interface.
1 = Infrared IrDA Tx/Rx. The data input and output levels complies to the IrDA infrared interface. The
Tx output is at logic 0 during the idle state.
0 = Standard modem Tx/Rx (default).
Xon-Any Enable
This bit enables Xon-Any feature.
1 = Enable Xon-Any function. When Xon/Xoff flow control is enabled, the transmission resumes when
any character is received. The received character is loaded into the Rx FIFO except for Xon or Xoff
characters.
0 = Disable Xon-Any function (default).
FIGURE 1. Internal Clock Dividers
TABLE 11. MCR (0x4)
18
common clock input from DC to 80 MHz and dividing the clock
frequency by 1 (default) or 4 depending on the MCR[7] value.
The clock divider and the internal clock division flow is shown
in Figure 1.
Description
20204803