SC16IS752IPW-S NXP Semiconductors, SC16IS752IPW-S Datasheet - Page 41
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SC16IS752IPW-S
Manufacturer Part Number
SC16IS752IPW-S
Description
IC UART DUAL I2C/SPI 28-TSSOP
Manufacturer
NXP Semiconductors
Datasheet
1.SC16IS752IBS151.pdf
(59 pages)
Specifications of SC16IS752IPW-S
Features
Low Current
Number Of Channels
2, DUART
Fifo's
64 Byte
Protocol
RS232, RS485
Voltage - Supply
2.5V, 3.3V
With Auto Flow Control
Yes
With Irda Encoder/decoder
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
Mounting Type
Surface Mount
Package / Case
28-TSSOP (0.173", 4.40mm Width)
For Use With
568-4000 - DEMO BOARD SPI/I2C TO DUAL UART568-3510 - DEMO BOARD SPI/I2C TO UART
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-2237
Fig 20. SPI operation
SCLK
SCLK
SCLK
SCLK
SO
SO
(1) Last bit (D0) of the last byte to be written to the transmit FIFO.
(2) Last bit (D0) of the last byte to be read from the receive FIFO.
a. Register write
d. FIFO read cycle
b. Register read
c. FIFO write cycle
SI
SI
SI
SI
R/W = 0; A[3:0] = register address; CH[1:0] = 00 for channel A; CH[1:0] = 01 for channel B
R/W = 1; A[3:0] = register address; CH[1:0] = 00 for channel A; CH[1:0] = 01 for channel B
R/W = 0; A[3:0] = 0000; CH[1:0] = 00 for channel A; CH[1:0] = 01 for channel B
R/W = 1; A[3:0] = 0000; CH[1:0] = 00 for channel A; CH[1:0] = 01 for channel B
R/W
R/W
R/W
R/W
A3
A3
A3
A3
A2
A2
A2
A2
A1
A1
A1
A1
A0
A0
A0
A0
CH1
CH1
CH1
CH1
CH0
CH0
CH0
CH0
X
X
X
X
D7
D7
D7
D7
D6
D6
D6
D6
D5
D5
D5
D5
D4
D4
D4
D4
D3
D3
D3
D3
D2
D2
D2
D2
D1
D1
D1
D1
D0
D0
D0
D0
D7
D7
D6
D6
D5
D5
D4
D4
D3
D3
D2
D2
D1
D1
D0
D0
last bit
last bit
(1)
(2)
002aab433
002aab434
002aab435
002aab436