SC16C554IB80,551 NXP Semiconductors, SC16C554IB80,551 Datasheet - Page 11
![IC UART QUAD W/FIFO 80-LQFP](/photos/6/89/68976/80-lqfp_sot315-1_pkg_sml.jpg)
SC16C554IB80,551
Manufacturer Part Number
SC16C554IB80,551
Description
IC UART QUAD W/FIFO 80-LQFP
Manufacturer
NXP Semiconductors
Datasheet
1.SC16C554IB80551.pdf
(53 pages)
Specifications of SC16C554IB80,551
Number Of Channels
4, QUART
Fifo's
16 Byte
Voltage - Supply
2.5V, 3.3V, 5V
With Auto Flow Control
Yes
With Irda Encoder/decoder
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
With Cmos
Yes
Mounting Type
Surface Mount
Package / Case
80-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-3271
935270075551
SC16C554IB80-S
935270075551
SC16C554IB80-S
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SC16C554IB80,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Philips Semiconductors
Table 2:
9397 750 11616
Product data
Symbol
IOW
IRQ
NC
RESET,
RESET
RIA, RIB,
RIC, RID
RTSA, RTSB,
RTSC, RTSD
R/W
Pin description
Pin
PLCC68 LQFP64 LQFP80
18
15
21, 49,
52, 54,
55, 65
37
8, 28,
42, 62
14, 22,
48, 56
18
9
-
-
27
63, 19,
30, 50
5, 13,
36, 44
-
…continued
31
-
1, 10,
20, 21,
30, 40,
41, 49,
52, 60,
71, 80
53
18, 43,
58, 3
26, 35,
66, 75
-
Quad UART with 16-byte FIFO and infrared (IrDA) encoder/decoder
Type
I
O
-
I
I
O
I
Rev. 04 — 19 June 2003
Description
Input/Output Write strobe (Active-LOW). This function is
associated with the 16 mode only. A logic 0 transition on this pin will
transfer the contents of the data bus (D0-D7) from the external CPU
to an internal register that is defined by address bits A0-A2. When
the 16 mode is selected (PLCC68), this pin functions as R/W (see
definition under R/W).
Interrupt Request or Interrupt ‘A’. This function is associated with
the 68 mode only. In the 68 mode, interrupts from UART channels
A-D are wire-ORed internally to function as a single IRQ interrupt.
This pin transitions to a logic 0 (if enabled by the interrupt enable
register) whenever a UART channel(s) requires service. Individual
channel interrupt status can be determined by addressing each
channel through its associated internal register, using CS and A3-A4.
In the 68 mode, and external pull-up resistor must be connected
between this pin and V
when operating in the 16 mode (see definition under INTA).
Not connected.
Reset. In the 16 mode, a logic 1 on this pin will reset the internal
registers and all the outputs. The UART transmitter output and the
receiver input will be disabled during reset time. (See
“SC16C554/554D external reset conditions”
When 16/68 is a logic 0 (68 mode), this pin functions similarly, bus as
an inverted reset interface signal, RESET.
Ring Indicator (Active-LOW). These inputs are associated with
individual UART channels, A through D. A logic 0 on this pin indicates
the modem has received a ringing signal from the telephone line. A
logic 1 transition on this input pin will generate an interrupt.
Request to Send (Active-LOW). These outputs are associated with
individual UART channels, A through D. A logic 0 on the RTS pin
indicates the transmitter has data ready and waiting to send. Writing
a logic 1 in the modem control register MCR[1] will set this pin to a
logic 0, indicating data is available. After a reset this pin will be set to
a logic 1. This pin only affects the transmit and receive operations
when Auto RTS function is enabled via the Enhanced Feature
Register (EFR[6]) for hardware flow control operation.
Read/Write strobe. This function is associated with the 68 mode
only. This pin provides the combined functions for Read or Write
strobes.
Logic 1 = Read from UART register selected by CS and A0-A4.
Logic 0 = Write to UART register selected by CS and A0-A4.
CC
. The function of this pin changes to INTA
SC16C554/554D
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
for initialization details.)
Section 7.11
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