SC16C550IA44,512 NXP Semiconductors, SC16C550IA44,512 Datasheet - Page 12

• Manufacturer Part Number: SC16C550IA44,512
• Description: IC UART SOT187-2
• Manufacturer: NXP Semiconductors

Specifications of SC16C550IA44,512

• Features: Programmable
• Number Of Channels: 1, UART
• Fifo's: 16 Byte
• Voltage - Supply: 2.5V, 3.3V, 5V
• With Auto Flow Control: Yes
• With Irda Encoder/decoder: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• With Cmos: Yes
• Mounting Type: Surface Mount
• Package / Case: 44-LCC (J-Lead)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935270058512; SC16C550IA44; SC16C550IA44

Philips Semiconductors
9397 750 11619
Product data
Fig 6. CTS functional timing waveforms.
Fig 7. RTS functional timing waveforms, RCV FIFO trigger level = 1, 4, or 8 bytes.
(1) When CTS is LOW, the transmitter keeps sending serial data out.
(2) If CTS goes HIGH before the middle of the last stop bit of the current byte, the transmitter finishes sending the current byte,
(3) When CTS goes from HIGH to LOW, the transmitter begins sending data again.
(1) N = RCV FIFO trigger level (1, 4, or 8 bytes).
(2) The two blocks in dashed lines cover the case where an additional byte is sent as described in the preceding auto-RTS
(RD RBR)
CTS
but is does not send the next byte.
section.
TX
RTS
IOR
RX
START
6.3.2 Auto-CTS (see
6.3.3 Enabling autoflow control and auto-CTS
6.3.4 Auto-CTS and auto-RTS functional timing
START
BITS 0-7
The transmitter circuitry checks CTS before sending the next data byte. When CTS is
active, it sends the next byte. To stop the transmitter from sending the following byte,
CTS must be released before the middle of the last stop bit that is currently being
sent (see
When flow control is enabled, CTS level changes do not trigger host interrupts
because the device automatically controls its own transmitter. Without auto-CTS, the
transmitter sends any data present in the transmit FIFO and a receiver overrun error
may result.
Autoflow control is enabled by setting Enhanced Feature register bits 6 and 7
(autoflow enable or AFE) to a ‘1’.
The receiver FIFO trigger level can be set to 1, 4, 8, or 14 bytes. These are described
in
BYTE N
Figure 7
STOP
STOP
Figure
and
Figure
Figure
START
6). The auto-CTS function reduces interrupts to the host system.
Rev. 05 — 19 June 2003
1
START
BYTE N + 1
8.
5)
BITS 0-7
2
UART with 16-byte FIFO and IrDA encoder/decoder
STOP
STOP
N
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
N+1
START
START
SC16C550
BITS 0-7
BYTE
STOP
STOP
002aaa050
002aaa049
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