SC16C554IB64,151 NXP Semiconductors, SC16C554IB64,151 Datasheet

IC UART QUAD SOT314-2

SC16C554IB64,151

Manufacturer Part Number
SC16C554IB64,151
Description
IC UART QUAD SOT314-2
Manufacturer
NXP Semiconductors
Datasheets

Specifications of SC16C554IB64,151

Number Of Channels
4, QUART
Fifo's
16 Byte
Voltage - Supply
2.5V, 3.3V, 5V
With Auto Flow Control
Yes
With Irda Encoder/decoder
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
With Cmos
Yes
Mounting Type
Surface Mount
Package / Case
64-LQFP
Transmit Fifo
16Byte
Receive Fifo
16Byte
Transmitter And Receiver Fifo Counter
Yes
Data Rate
5Mbps
Package Type
LQFP
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935270074151
SC16C554IB64-S
SC16C554IB64-S
1. Description
2. Features
The SC16C554/554D is a 4-channel Universal Asynchronous Receiver and
Transmitter (QUART) used for serial data communications. Its principal function is to
convert parallel data into serial data and vice versa. The UART can handle serial data
rates up to 5 Mbits/s. It comes with an Intel or Motorola interface.
The SC16C554/554D is pin compatible with the ST16C554 and TL16C554 and it will
power-up to be functionally equivalent to the 16C454. Programming of control
registers enables the added features of the SC16C554/554D. Some of these added
features are the 16-byte receive and transmit FIFOs, automatic hardware or software
flow control and Infrared encoding/decoding. The selectable auto-flow control feature
significantly reduces software overload and increases system efficiency while in FIFO
mode by automatically controlling serial data flow using RTS output and CTS input
signals. The SC16C554/554D also provides DMA mode data transfers through FIFO
trigger levels and the TXRDY and RXRDY signals. On-board status registers provide
the user with error indications, operational status, and modem interface control.
System interrupts may be tailored to meet user requirements. An internal loop-back
capability allows on-board diagnostics.
The SC16C554/554D operates at 5 V, 3.3 V and 2.5 V, and the industrial temperature
range, and is available in plastic PLCC68, LQFP64, and LQFP80 packages.
SC16C554/554D
Quad UART with 16-byte FIFO and infrared (IrDA)
encoder/decoder
Rev. 04 — 19 June 2003
5 V, 3.3 V and 2.5 V operation
Industrial temperature range
Pin compatibility with the industry-standard ST16C454/554, ST68C454/554,
ST16C554, TL16C554
Up to 5 Mbits/s data rate at 5 V and 3.3 V, and 3 Mbits/s at 2.5 V
16-byte transmit FIFO
16-byte receive FIFO with error flags
Automatic software/hardware flow control
Programmable Xon/Xoff characters
Software selectable Baud Rate Generator
Four selectable Receive FIFO interrupt trigger levels
Standard modem interface or infrared IrDA encoder/decoder interface
Sleep mode
Standard asynchronous error and framing bits (Start, Stop, and Parity Overrun
Break)
Transmit, Receive, Line Status, and Data Set interrupts independently controlled
Product data

Related parts for SC16C554IB64,151

SC16C554IB64,151 Summary of contents

Page 1

SC16C554/554D Quad UART with 16-byte FIFO and infrared (IrDA) encoder/decoder Rev. 04 — 19 June 2003 1. Description The SC16C554/554D is a 4-channel Universal Asynchronous Receiver and Transmitter (QUART) used for serial data communications. Its principal function is to convert ...

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Philips Semiconductors Fully programmable character formatting: False start-bit detection Complete status reporting capabilities 3-State output TTL drive capabilities for bi-directional data bus and control bus Line Break generation and detection Internal diagnostic capabilities: Prioritized interrupt system controls Modem control functions ...

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Philips Semiconductors 4. Block diagram SC16C554/554D D0–D7 DATA BUS IOR AND IOW CONTROL LOGIC RESET A0–A2 REGISTER CSA-CSD SELECT LOGIC 16/68 INTA-INTD TXRDY RXRDY INTERRUPT CONTROL LOGIC INTSEL Fig 1. SC16C554/554D block diagram (16 mode). 9397 750 11616 Product data ...

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Philips Semiconductors SC16C554/554D D0–D7 DATA BUS R/W AND RESET CONTROL LOGIC A0–A4 REGISTER CS SELECT LOGIC 16/68 IRQ INTERRUPT TXRDY CONTROL RXRDY LOGIC Fig 2. SC16C554/554D block diagram (68 mode). 9397 750 11616 Product data Quad UART with 16-byte FIFO ...

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Philips Semiconductors 5. Pinning information 5.1 Pinning 5.1.1 PLCC68 DSRA 10 CTSA 11 DTRA RTSA 14 INTA 15 CSA 16 TXA 17 IOW 18 TXB 19 CSB 20 INTB 21 RTSB 22 GND 23 DTRB 24 ...

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Philips Semiconductors DSRA 10 CTSA 11 DTRA RTSA 14 IRQ TXA 17 R/W 18 TXB RTSB 22 GND 23 DTRB 24 CTSB 25 DSRB 26 Fig 4. PLCC68 ...

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Philips Semiconductors 5.1.2 LQFP64 DSRA 1 CTSA 2 DTRA RTSA 5 INTA 6 CSA 7 TXA 8 IOW 9 TXB 10 CSB 11 INTB 12 RTSB 13 GND 14 DTRB 15 CTSB 16 Fig 5. LQFP64 ...

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Philips Semiconductors 5.1.3 LQFP80 handbook, full pagewidth NC 1 CDD 2 RID 3 RXD INTSEL GND 16 ...

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Philips Semiconductors 5.2 Pin description Table 2: Pin description Pin Symbol PLCC68 LQFP64 LQFP80 16/ A3 CDA, CDB, 9, 27, 64, 18, CDC, CDD 43, ...

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Philips Semiconductors Table 2: Pin description …continued Pin Symbol PLCC68 LQFP64 LQFP80 D0-D2, 66-68, 53-55, D3-D7 1-5 56-60 DSRA, 10, 26, 1, 17, DSRB, 44, 60 32, 48 DSRC, DSRD DTRA, 12, 24, 3, 15, DTRB, 46, 58 34, 46 ...

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Philips Semiconductors Table 2: Pin description …continued Pin Symbol PLCC68 LQFP64 LQFP80 IOW 18 9 IRQ 21, 49, - 52, 54, 55, 65 RESET RESET RIA, RIB, 8, 28, 63, 19, RIC, RID 42, 62 ...

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Philips Semiconductors Table 2: Pin description …continued Pin Symbol PLCC68 LQFP64 LQFP80 RXA, RXB, 7, 29, 62, 20, RXC, RXD 41, 63 29, 51 RXRDY 38 - TXA, TXB, 17, 19, 8, 10, TXC, TXD 51, 53 39, 41 TXRDY ...

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Philips Semiconductors 6. Functional description The SC16C554/554D provides serial asynchronous receive data synchronization, parallel-to-serial and serial-to-parallel data conversions for both the transmitter and receiver sections. These functions are necessary for converting the serial data stream into parallel data that is ...

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Philips Semiconductors 6.1 Interface options Two user interface modes are selectable for the PLCC68 package. These interface modes are designated as the ‘16 mode’ and the ‘68 mode’. This nomenclature corresponds to the early 16C454/554 and 68C454/554 package interfaces respectively. ...

Page 15

Philips Semiconductors 6.4 Internal registers The SC16C554/554D provides 15 internal registers for monitoring and control. These registers are shown in (THR/RHR), interrupt status and control registers (IER/ISR), a FIFO control register (FCR), line status and control registers (LCR/LSR), modem status ...

Page 16

Philips Semiconductors Table 6: Selected trigger level (characters 6.6 Hardware flow control When automatic hardware flow control is enabled, the SC16C554/554D monitors the CTS pin for a remote buffer overflow indication and controls the RTS pin ...

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Philips Semiconductors characters as soon as received data passes the programmed trigger level. To clear this condition, the SC16C554/554D will transmit the programmed Xon1,2 characters as soon as receive data drops below the programmed trigger level. 6.8 Special feature software ...

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Philips Semiconductors 6.10 Programmable baud rate generator The SC16C554/554D supports high speed modem technologies that have increased input data rates by employing data compression schemes. For example, a 33.6 kbit/s modem that employs data compression may require a 115.2 kbit/s ...

Page 19

Philips Semiconductors 6.11 DMA operation The SC16C554/554D FIFO trigger level provides additional flexibility to the user for block mode operation. LSR[5,6] provide an indication when the transmitter is empty or has an empty location(s). The user can optionally operate the ...

Page 20

Philips Semiconductors SC16C554/554D D0–D7 DATA BUS IOR AND IOW CONTROL LOGIC RESET A0–A2 REGISTER CSA-CSD SELECT LOGIC INTA-INTD INTERRUPT TXRDY CONTROL RXRDY LOGIC Fig 8. Internal loop-back mode diagram. 9397 750 11616 Product data Quad UART with 16-byte FIFO and ...

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Philips Semiconductors 7. Register descriptions Table 8 The assigned bit functions are more fully defined in Table 8: SC16C554/554D internal registers Shaded bits are only accessible when EFR[4] is set. [ Register Default [2] General Register Set ...

Page 22

Philips Semiconductors 7.1 Transmit (THR) and Receive (RHR) Holding Registers The serial transmitter section consists of an 8-bit Transmit Hold Register (THR) and Transmit Shift Register (TSR). The status of the THR is provided in the Line Status Register (LSR). ...

Page 23

Philips Semiconductors Table 9: Bit 7.2.1 IER versus Receive FIFO interrupt mode operation When the receive FIFO (FCR[0] = logic 1), and receive interrupts (IER[0] = logic 1) are enabled, the receive interrupts and register status will ...

Page 24

Philips Semiconductors 7.3 FIFO Control Register (FCR) This register is used to enable the FIFOs, clear the FIFOs, set the transmit/receive FIFO trigger levels, and select the DMA mode. 7.3.1 DMA mode Mode 0 (FCR bit 3 = 0): receive ...

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Philips Semiconductors Table 10: Bit Table 11: FCR[ 9397 750 11616 Product data Quad UART with 16-byte FIFO and infrared (IrDA) encoder/decoder FIFO Control Register bits description Symbol Description Transmit operation in mode ...

Page 26

Philips Semiconductors 7.4 Interrupt Status Register (ISR) The SC16C554/554D provides six levels of prioritized interrupts to minimize external software interaction. The Interrupt Status Register (ISR) provides the user with six interrupt status bits. Performing a read cycle on the ISR ...

Page 27

Philips Semiconductors 7.5 Line Control Register (LCR) The Line Control Register is used to specify the asynchronous data communication format. The word length, the number of stop bits, and the parity are selected by writing the appropriate bits in this ...

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Philips Semiconductors Table 15: LCR[ Table 16: LCR[ Table 17: LCR[ 9397 750 11616 Product data Quad UART with 16-byte FIFO and infrared (IrDA) encoder/decoder LCR[5] parity selection ...

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Philips Semiconductors 7.6 Modem Control Register (MCR) This register controls the interface with the modem or a peripheral device. Table 18: Bit 9397 750 11616 Product data Quad UART with 16-byte FIFO ...

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Philips Semiconductors 7.7 Line Status Register (LSR) This register provides the status of data transfers between the SC16C554/554D and the CPU. Table 19: Bit 9397 750 11616 Product data Quad UART with 16-byte ...

Page 31

Philips Semiconductors Table 19: Bit 0 7.8 Modem Status Register (MSR) This register provides the current state of the control interface signals from the modem, or other peripheral device to which the SC16C554/554D is connected. Four bits of this register ...

Page 32

Philips Semiconductors Table 20: Bit 1 0 [1] Whenever any MSR bit 0-3 is set to logic 1, a Modem Status Interrupt will be generated. 7.9 Scratchpad Register (SPR) The SC16C554/554D provides a temporary data register to store 8 bits ...

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Philips Semiconductors Table 21: Bit 5 4 3-0 Table 22: Cont [1] When using software flow control the Xon/Xoff characters cannot be used for data transfer. 9397 750 11616 Product ...

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Philips Semiconductors 7.11 SC16C554/554D external reset conditions Table 23: Register IER ISR LCR MCR LSR MSR FCR EFR Table 24: Output TXA, TXB, TXC, TXD RTSA, RTSB, RTSC, RTSD DTRA, DTRB, DTRC, DTRD RXRDY TXRDY 8. Limiting values Table 25: ...

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Table 26: DC electrical characteristics + 2 5.0 V 10%, unless otherwise specified. amb CC Symbol ...

Page 36

Philips Semiconductors 10. Dynamic characteristics Table 27: AC electrical characteristics + 2 5.0 V 10%, unless otherwise specified. amb CC Symbol Parameter clock pulse duration ...

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Philips Semiconductors Table 27: AC electrical characteristics + 2 5.0 V 10%, unless otherwise specified. amb CC Symbol Parameter t write cycle delay 32d t data set-up time ...

Page 38

Philips Semiconductors A0–A4 t 30s CS t 32s R/W D0–D7 Fig 10. General write timing in 68 mode. A0– 13d IOW D0–D7 Fig 11. General write timing in 16 mode. 9397 750 11616 Product data Quad ...

Page 39

Philips Semiconductors A0– IOR D0–D7 Fig 12. General read timing in 16 mode. IOW ACTIVE RTS CHANGE OF STATE DTR CD CTS DSR INT IOR RI Fig 13. Modem input/output timing. 9397 750 11616 Product ...

Page 40

Philips Semiconductors t 2w EXTERNAL CLOCK Fig 14. External clock timing. START BIT RX INT IOR Fig 15. Receive timing. 9397 750 11616 Product data Quad UART with 16-byte FIFO and infrared (IrDA) encoder/decoder DATA BITS ...

Page 41

Philips Semiconductors START BIT RX RXRDY IOR Fig 16. Receive ready timing in non-FIFO mode. START BIT RX RXRDY IOR Fig 17. Receive ready timing in FIFO mode. 9397 750 11616 Product data Quad UART with 16-byte FIFO and infrared ...

Page 42

Philips Semiconductors START BIT TX INT ACTIVE IOW Fig 18. Transmit timing. 9397 750 11616 Product data Quad UART with 16-byte FIFO and infrared (IrDA) encoder/decoder DATA BITS (5– DATA BITS 6 DATA ...

Page 43

Philips Semiconductors Fig 19. Transmit ready timing in non-FIFO mode. 9397 750 11616 Product data Quad UART with 16-byte FIFO and infrared (IrDA) encoder/decoder Rev. 04 — 19 June 2003 SC16C554/554D © Koninklijke Philips Electronics N.V. 2003. All rights reserved. ...

Page 44

Philips Semiconductors START BIT TX ACTIVE IOW D0–D7 BYTE #16 t 27d TXRDY Fig 20. Transmit ready timing in FIFO mode (DMA mode ‘1’). 9397 750 11616 Product data Quad UART with 16-byte FIFO and infrared (IrDA) encoder/decoder DATA BITS ...

Page 45

Philips Semiconductors IRTXA–IRTXD Fig 21. Infrared transmit timing. IRRXA–IRRXD Fig 22. Infrared receive timing. 9397 750 11616 Product data Quad UART with 16-byte FIFO and infrared (IrDA) encoder/decoder UART FRAME DATA TX BIT TIME RX ...

Page 46

Philips Semiconductors 11. Package outline PLCC68: plastic leaded chip carrier; 68 leads pin 1 index DIMENSIONS (mm dimensions are derived from the original inch dimensions) A ...

Page 47

Philips Semiconductors LQFP64: plastic low profile quad flat package; 64 leads; body 1 pin 1 index DIMENSIONS (mm are the original dimensions) A ...

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Philips Semiconductors LQFP80: plastic low profile quad flat package; 80 leads; body 1 pin 1 index DIMENSIONS (mm are the original dimensions) A ...

Page 49

Philips Semiconductors 12. Soldering 12.1 Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our Data Handbook IC26; Integrated Circuit Packages ...

Page 50

Philips Semiconductors • For packages with leads on two sides and a pitch (e): – larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be – smaller than 1.27 mm, the footprint longitudinal axis must ...

Page 51

Philips Semiconductors [3] These transparent plastic packages are extremely sensitive to reflow soldering conditions and must on no account be processed through more than one soldering cycle or subjected to infrared reflow soldering with peak temperature exceeding 217 C oven. ...

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Philips Semiconductors 14. Data sheet status [1] Level Data sheet status Product status I Objective data Development II Preliminary data Qualification III Product data Production [1] Please consult the most recently issued data sheet before initiating or completing a design. ...

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Philips Semiconductors Contents 1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . ...

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