MT47H128M8HQ-187EIT:G Micron Technology Inc, MT47H128M8HQ-187EIT:G Datasheet - Page 30
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MT47H128M8HQ-187EIT:G
Manufacturer Part Number
MT47H128M8HQ-187EIT:G
Description
Manufacturer
Micron Technology Inc
Datasheet
1.MT47H128M8HQ-187EITG.pdf
(136 pages)
Specifications of MT47H128M8HQ-187EIT:G
Lead Free Status / Rohs Status
Compliant
- Current page: 30 of 136
- Download datasheet (3Mb)
PDF: 09005aef821ae8bf
1GbDDR2.pdf – Rev. W 7/11 EN
4. Data bus consists of DQ, DM, DQS, DQS#, RDQS, RDQS#, LDQS, LDQS#, UDQS, and
5. Definitions for I
6. I
7. The following I
UDQS#. I
devices when operated outside of the range 0°C
LOW
HIGH
Stable
Floating
Switching Inputs changing between HIGH and LOW every other clock cycle (once per
Switching Inputs changing between HIGH and LOW every other data transfer (once
When
T
When
T
DD1
C
C
, I
0°C
85°C
DD4R
DD
, and I
I
ed by 2%; and I
I
ed by 2%; I
30%; and I
T
values must be met with all combinations of EMR bits 10 and 11.
DD2P
DD0
C
V
V
Inputs stable at a HIGH or LOW level
Inputs at V
two clocks) for address and control signals
per clock) for DQ signals, not including masks or strobes
< 85°C and the 2X refresh option is still enabled)
IN
IN
, I
DD
DD
DD7
and I
DD1
V
V
values must be derated (I
conditions:
IL(AC)max
IH(AC)min
require A12 in EMR to be enabled during testing.
, I
DD3P(SLOW)
DD2N
DD6
DD2P
REF
must be derated by 80% (I
30
, I
= V
DD6
must be derated by 20%; I
DD2Q
Electrical Specifications – I
DDQ
and I
must be derated by 4%; I
, I
/2
DD3N
DD7
Micron Technology, Inc. reserves the right to change products or specifications without notice.
, I
must be derated by 7%
DD3P(FAST)
DD
1Gb: x4, x8, x16 DDR2 SDRAM
limits increase) on IT-option and AT-option
, I
T
DD4R
C
DD6
DD3P(SLOW)
85°C:
, I
will increase by this amount if
DD4R
DD4W
2007 Micron Technology, Inc. All rights reserved.
and I
, and I
must be derated by
DD5W
DD
DD5W
Parameters
must be derat-
must be derat-
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