LTC6994CS6-2#PBF Linear Technology, LTC6994CS6-2#PBF Datasheet - Page 12

• Manufacturer Part Number: LTC6994CS6-2#PBF
• Manufacturer: Linear Technology

Specifications of LTC6994CS6-2#PBF

• Lead Free Status / Rohs Status: Compliant

LTC6994-1/LTC6994-2
operaTion
If the voltage is generated by other means (i.e., the output
of a DAC) it must track the V
column in Table 1 shows the ideal ratio of V
supply voltage, which can also be calculated as:
Table 1. DIVCODE Programming
12
DIVCODE
V
V
DIV
+
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
=
DIVCODE + 0.5
16
POL
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
10000
± 1.5%
0.001
1000
0.01
100
0.1
10
2,097,152
2,097,152
1
262,144
262,144
32,768
32,768
+
0V
4,096
4,096
N
512
512
64
64
supply voltage. The last
DIV
1
8
8
1
0
1
Figure 2. Delay Range and POL Bit vs DIVCODE
2
POL BIT = 0
Recommended t
2.097sec to 33.55sec
2.097sec to 33.55sec
3
262.1ms to 4.194sec
262.1ms to 4.194sec
4.096ms to 65.54ms
32.77ms to 524.3ms
32.77ms to 524.3ms
4.096ms to 65.54ms
512µs to 8.192ms
512µs to 8.192ms
64µs to 1.024ms
64µs to 1.024ms
DIV
8µs to 128µs
8µs to 128µs
1µs to 16µs
1µs to 16µs
4
to the
5
6
INCREASING V
DELAY
7
0.5•V
For example, if the supply is 3.3V and the desired DIVCODE
is 4, V
Figure 2 illustrates the information in Table 1, showing
that N
+
8
DIV
DIV
DIV
9
R1 (k)
Open
1000
Short
1000
1000
1000
1000
976
976
887
681
523
392
280
182
102
is symmetric around the DIVCODE midpoint.
10
= 0.281 • 3.3V = 928mV ± 50mV.
POL BIT = 1
11
12
13
R2 (k)
Short
1000
1000
1000
1000
1000
Open
102
182
280
392
523
681
887
976
976
14
699412 F02
15
V
+
≤ 0.03125 ±0.015
≥ 0.96875 ±0.015
0.09375 ±0.015
0.15625 ±0.015
0.21875 ±0.015
0.28125 ±0.015
0.34375 ±0.015
0.40625 ±0.015
0.46875 ±0.015
0.53125 ±0.015
0.59375 ±0.015
0.65625 ±0.015
0.71875 ±0.015
0.78125 ±0.015
0.84375 ±0.015
0.90625 ±0.015
V
DIV
/V
+
699412fa